CDCE913-Q1: Difference between non-Q1

Hello Kurumi,

There are no other points - other than the previously listed - that should be taken care of when replacing CDCE913 with CDCE913-Q1.  

The CDCE913-Q1 is meant to improve temperature range.

Hope that helps!

Hello Aaron,

Thank you for the quick response. I understand.

If there is no other difference, could you tell why some LVCMOS parameters are same but some are different?

For Vddout=2.5V mode, Q1 has higher value for max (tjit, tjit, tsk). Which make sense since the operational temp is higher for Q1.

However, for Vddout=1.8V mode, those value is the same for non-Q1 and Q1.

Could you tell the reason behind? Does Vddout=2.5V mode have higher value because of other reason not the temp range?

Also, if Q1 is used in the range of -40~85 degree, the performance would be same as non-Q1. Is it correct?

Best regards,

Kurumi

Hello Kurumi,

With the CDCE9xx family being an older device now - the data collected when Qualifying this device is not readily available to review at the moment.

I will have to do some digging to find why values at 1.8V are not changed.

The die for CDCE913 is different to the CDCE913-Q1 and definitely could yield these results.

Please advise what use case is likely to be utilized?

Hello Aaron,

CDCE913　has been used, but recently it is becoming difficult to obtain because of the market situation.

Q1 version has better availability, so it is considered to be a replacement.

CDCE913　(or -Q1) will be used with room temp, but need to ensure the performance difference.

Could you please check the reason behind the difference/similarity of datasheet value?

Best regards,

Kurumi

Hello Kurumi,

I unfortunately do no have direct access to the collected history of these devices at this time.

While I obtain more help I would also suggest that the CDCE913-Q1 jitter performance must also be effected by the increased temperature range. Keep in mind that the datasheet ensures the jitter performance across this increased range.

Also keep in mind jitter performance varies greatly with the configuration of the PLL settings. I would highly suggest customer utilizes the associated 'PERFEVM' to test frequency settings.

Is there a specific jitter requirement in customer use case? What would this be?

Hi Aaron,

Yes, the jitter value is also effected, Q1 has higher max value. It makes sense considering the temp range is wider. With that, the value for Vddout=1.8V mode seems more mysterious to me though…

Thank you for the advice, there is no specific jitter requirements for now. I’ll keep that in mind and suggest utilizing EVM.

If there is data for Q1 with temp -40~85 degree compare with non-Q1, I’d appreciate it very much.

Best regards,

Kurumi

Hello Kurumi,

This data is harder to get to. I'm still reaching out for others to help with this. Thank you for your patience.

Hello Aaron,

I've re-checked, and you are totally right! There are two variations. Everything make sense now.

Thank you so much for your help.

Best regards,

Kurumi