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Original question:

LMX2595: LMX2595 REF signal source used by TI

LMX2595: To generate 12794MHz with good spurious and phase noise performance

Jonette Low
Prodigy 10 points
Part Number: LMX2595


Hi 

How can i get the PLL to lock when my Fosc is 480MHz.

My parameters are as below:

Parameter  Setting/input PLL Status Signal Analyser
Fosc 240MHz    
Oscin Doubler 0    
Pre_R divider 3    
MULT Bypass    
R 1    
Fpd 80Mhz    
N divider 159    
Fractional  925    
denominator 1000    
FVCO 12794 PLL lock correct freq
Fosc 480MHz    
Oscin Doubler 0    
Pre_R divider 3    
MULT Bypass    
R 1    
Fpd 80Mhz    
N divider 159    
Fractional  925    
denominator 1000    
FVCO 12794 PLL unlock wrong freq or unable to generate

Is there any issues in my settings? thanks

  • 0
    TI__Genius 12560 points

    Hi Jonette,

    When you doubled Fosc frequency to 480MHz, for the same Fpd frequency (80MHz)  Pre_R divider should change to 6. In that case, PLL should lock.

    Below is the configuration file (for 480MHz Fosc frequency) FYR.

    R112	0x700000
R111	0x6F0000
R110	0x6E0000
R109	0x6D0000
R108	0x6C0000
R107	0x6B0000
R106	0x6A0000
R105	0x690021
R104	0x680000
R103	0x670000
R102	0x660000
R101	0x650011
R100	0x640000
R99	0x630000
R98	0x620000
R97	0x610888
R96	0x600000
R95	0x5F0000
R94	0x5E0000
R93	0x5D0000
R92	0x5C0000
R91	0x5B0000
R90	0x5A0000
R89	0x590000
R88	0x580000
R87	0x570000
R86	0x560000
R85	0x550000
R84	0x540000
R83	0x530000
R82	0x520000
R81	0x510000
R80	0x500000
R79	0x4F0000
R78	0x4E0003
R77	0x4D0000
R76	0x4C000C
R75	0x4B0800
R74	0x4A0000
R73	0x49003F
R72	0x480001
R71	0x470081
R70	0x46C350
R69	0x450000
R68	0x4403E8
R67	0x430000
R66	0x4201F4
R65	0x410000
R64	0x401388
R63	0x3F0000
R62	0x3E0322
R61	0x3D00A8
R60	0x3C0000
R59	0x3B0001
R58	0x3A9001
R57	0x390020
R56	0x380000
R55	0x370000
R54	0x360000
R53	0x350000
R52	0x340820
R51	0x330080
R50	0x320000
R49	0x314180
R48	0x300300
R47	0x2F0300
R46	0x2E07FC
R45	0x2DC8DF
R44	0x2C1FA3
R43	0x2B039D
R42	0x2A0000
R41	0x290000
R40	0x280000
R39	0x2703E8
R38	0x260000
R37	0x250404
R36	0x24009F
R35	0x230004
R34	0x220000
R33	0x211E21
R32	0x200393
R31	0x1F43EC
R30	0x1E318C
R29	0x1D318C
R28	0x1C0488
R27	0x1B0002
R26	0x1A0DB0
R25	0x190C2B
R24	0x18071A
R23	0x17007C
R22	0x160001
R21	0x150401
R20	0x14E048
R19	0x1327B7
R18	0x120064
R17	0x11012C
R16	0x100080
R15	0x0F064F
R14	0x0E1E70
R13	0x0D4000
R12	0x0C5006
R11	0x0B0018
R10	0x0A10D8
R9	0x090604
R8	0x082000
R7	0x0740B2
R6	0x06C802
R5	0x0500C8
R4	0x040C43
R3	0x030642
R2	0x020500
R1	0x01080A
R0	0x00241C

    Regards,

    Ajeet Pal

  • 0
    Prodigy 10 points

    Hi Ajeet,

    When I try to do the VCO_Phase Sync it does not work. So how should I set it for it so fulfilled the requirement of getting the low spurious, good phase noise performance and it being able to phase syn? 

  • 0 in reply to Jonette Low
    TI__Genius 12560 points

    Hi Jonette,

    Are you able to get the LMX2595 PLL lock for 480MHz reference with the above configuration settings?

    Regarding the VCO phase sync, you didn't mentioned in your previous question. So to have a VCO sync also, you need to maintain the minimum N-divider value with changing the Mash order, as mentioned in Table 2 of the LMX2595 datasheet.

     

    Regards,

    Ajeet Pal