Hello,
For our next project we are about to use the TI, LMX2820, 22.6-GHz Wideband PLLatinum RF Synthesizer.
In our design the PLL Reference signal is connected to OSCIN_P [8]. The Max reference signal power level on this pin is +3.5dBm.
This Reference signal will always be connected to OSCIN_P [8] pin even when the PLL VCC is OFF (VCC = 0V).
I have two questions for this PLL:
- Can the PLL be damaged if we apply +3.5dBm reference signal to OSCIN_P [8] pin when PLL VCC = 0V ?
- Is there a chance of a Latch-Up to the reference pin (OSCIN_P [8]) when we apply PLL VCC = 3.3V ?
Thanks,
Shay Ludin.