CDC421A156: Not differential output.

Hi,

I could be observing 2 causes:

1. For LVPECL output, 50ohm termination at receiver side should be after series cap. In current configuration, 150ohm and 50ohm are in parallel and it will affect overall required termination for LVPECL output.

2. Is X5 crystal or LVCMOS driver? If crystal, then follow its termination option from crystal datasheet. For LVCMOS input, follow below circuit.

Thanks!

Regards,

Ajeet Pal 

Thank you so much Ajeet Pal for your answer.

1. I can not modified the internal circuitry of the receiver, so the 50ohms terminations before the series cap can not be modified. What could I do here? to add a series cap in my external circuit? I mean between the 150 termination resistors and the receiver input. 

2. Yes, it is a LVCMOS input, I would try a rework to include that circuitry. The value of the serie cap (0.1pF) makes me think that it only represents the capacitance of the line. But you mean that I should add the caps and the resistors, right?

3. Do I need any of the following external termination circuit?

Thank you again in advance.

Hi,

user6195919 said:

1. I can not modified the internal circuitry of the receiver, so the 50ohms terminations before the series cap can not be modified. What could I do here? to add a series cap in my external circuit? I mean between the 150 termination resistors and the receiver input. 

Yes, you can place series caps between the 150 termination resistors and the receiver input. 

user6195919 said:

2. Yes, it is a LVCMOS input, I would try a rework to include that circuitry. The value of the serie cap (0.1pF) makes me think that it only represents the capacitance of the line. But you mean that I should add the caps and the resistors, right?

Series cap is needed to isolate the common mode level between input signal and device input pin in AC coupled mode. Shunt 50ohm is to provide the required input impedance for input signal.

user6195919 said:

3. Do I need any of the following external termination circuit?

For LVPECL output, 150ohm shunt already present. Hence no need to have any external circuit except series capacitor.

Thanks!

Regards,

Ajeet Pal

Hi Ajeet Pal,

I have implemented both suggested reworks but the clock generator is still not working. I have now the shown design implemented:

Any other ideas?

Thank you in advance.

Paula

Hi Paula,

Now the schematic looks good, except series cap (100pF) missing with shunt resistor (R428) at XIN1 input. Try to keep the series cap and see the performance. Also try to see the waveform at the input of XIN1 pin.

What is the output you are getting in this configuration? May be can verify the supplies also in circuit.

Thanks!

Regards,

Ajeet Pal

Hi Ajeet Pal,

I would try to add that series cap.

I am having no output (just noise with 10mVpp).

The input clock reference is not the best, but I have no idea on why.

I have already checked the supplies and enables and everything is okey. No special sequence is required, right? I have read in some other tickets in this forum, that the supply of the oscillator should be stable before supplying the clock generator, but that was related to a different PN, the datasheet of the device that I am using does not specify any specific sequence.

Thank you again,

regards.