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Part Number: CDCE62005

Dear TI team,

I have A situation where I am outputting an LVDS Clock output from CDCE62005 to LTC2107IUK @ 200MHz.

But the LVDS lines are crossing each other on the PCB. I do not want much layer changes as I need a dual pair of VIAs to manage it on PCB if I want to maintain the connection. So Can I connect the N output to P and Vice Verse on the PCB here. Will I do any harm as such or will it be a non-functional design for that matter.

Will there be any problem? 

Thanks. Will wait for your kind revert here.