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Hello there TI team,
I am hoping you can provide a schematic review for a my design for a client. I am providing a 36.864MHz oscillating clock into the LMK and then outputting it to two microcontrollers and one ADC (a Texas Instruments TLV320). Is it okay that I tie the 1G high so that it starts as soon as Vdd is stable? Then when I bring the oscillator up the buffer will then pass out the clock signal? Additionally, is it okay that I do my fanout signal impedance balancing by simply calculating the impedance of the trace to the sink IC and then add a resistor in series to bring the overall impedance up to 50ohms?
Thanks so much,
Peter
Hello Peter,
The power supply filtering your using should be fine but it's a little weak. I would recommend something like this (p. 13 in data sheet):
Is it okay that I tie the 1G high so that it starts as soon as Vdd is stable?
Is this why you did not add a pull resistor to the schematic?
Apart from those 2 points everything looks good.
Best,
Andrea
Hi there Andrea,
Thank you so much for the reply and consideration. My question regarding the ferrite bead is this: is there a known problem that the ferrite bead would address or is this more of a preventative measure. And further, is a ferrite bead the better solution over a pi filter? Is there any application note with oscope measurement with the ferrite filter that I might find to educate myself?
Regarding the pull up resistor, yes, I would like it to turn on ASAP and do not want to risk transience causing the pin to drift low due to too weak of a pull up. Would you recommend a pull up?
Thanks so much,
Peter
Hello Peter,
The ferrite bead is not needed or the pi filter, I meant adding another high frequency cap would be good.
Regarding the pull up resistor, yes, I would like it to turn on ASAP and do not want to risk transience causing the pin to drift low due to too weak of a pull up. Would you recommend a pull up
We do recommend a pull-up to limit any leakage current, however it's not needed.
Best,
Andrea