Tool/software:
Hi,
Could you review the schematic including loop filter and provide tcs file?
1. Clock IN : 100M Differential Clock
2. RFOUTA : 3.932GHz Differ clk
3. RFOUTB : 1.92MHz Differ clk
Thanks.
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Tool/software:
Hi,
Could you review the schematic including loop filter and provide tcs file?
1. Clock IN : 100M Differential Clock
2. RFOUTA : 3.932GHz Differ clk
3. RFOUTB : 1.92MHz Differ clk
Thanks.
Hi David,
Suggest add an additional 100nF capacitor at RFOUT 50Ω pull up. At 3.9GHz, 3.3pF 0402 capacitor is better than 100pF.
DS90LV028ATLD has propagation delay, if you need time critical SYNC or SYSREF, make sure you are able to compensate the delay.
You can skip the DS90LV028, set SYNC / SYSREF input format to LVDS,
Hi Noel,
Thanks for your support.
Could you provide .tcs file as well?
Thanks.