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LMK04816 Holdover in Pin Select Mode

Tuan To
Prodigy 210 points
Other Parts Discussed in Thread: LMK04816

In Pin Select Mode R13[11:9] = 3, when Holdover is selected with pin Status_CLKin1 = 1 and pin Status_CLKin0 = 1, is it still needed to set R12[7:6] with HOLDOVER_MODE = 2 (enabled) to force entering holdover? Or, should it be set R12[7:6] with HOLDOVER_MODE = 1 (disabled)?

Thanks,

Tuan To

  • 0
    TI__Genius 10320 points
    Hi Tuan,

    We recommend not using DLD to enter Holdover when in Pin Select Mode (CLKin_SELECT_MODE= 3) but you can still utilize Holdover in one of two ways.

    1. Manually enter holdover by setting FORCE_HOLDOVER (R15[5]) to 1. if EN_TRACK = 1, then the DAC will be set to the tracked Vtune voltage. If EN_TRACK = 0, then the MAN_DAC value will be used when in holdover.

    2. Vtune voltage crosses DAC high threshold (DAC_HIGH_TRIP) or low threshold (DAC_LOW_TRIP). EN_VTUNE_RAIL_DET should be set to 1 and EN_MAN_DAC as well as MAN_DAC should be set accordingly.

    Exiting holdover can be forced only by setting HOLDOVER_MODE to disabled. Setting FORCE_HOLDOVER to 0 will not force the device out of holdover in a deterministic manner; it is possible for the time to exit holdover to vary because the condition for automatic holdover exit is for
    the reference and feedback signals to have a time/phase error less than a programmable value. Because it is possible for two clock signals to be very close in frequency but not close in phase, it may take a long time for the phases of the clocks to align themselves within the allowable time/phase error before holdover exits.

    Please refer to section 7.5 in the DS.
  • 0
    TI__Mastermind 32575 points

    Per datasheet section 7.4.2, when in pin select mode (CLKin_SELECT_MODE=3), the HOLDOVER_MODE setting depends on the clock switch behavior you want to implement:

    Switch Event without Holdover (HOLDOVER_MODE=1)

    When an input clock switch event is triggered and holdover mode is disabled, the active clock input immediately switches to the selected clock. When PLL1 is designed with a narrow loop bandwidth, the switching transient is minimized.

    Switch Event with Holdover (HOLDOVER_MODE=2)

    When an input clock switch event is triggered and holdover mode is enabled, the device will enter holdover mode and remain in holdover until a holdover exit condition is met as described in Section 7.5. Then the device will complete the reference switch to the pin selected clock input.

    Regards,
    Alan

  • 0 in reply to Alan O
    Prodigy 210 points
    In Pin Pin Select Mode, when Status_CLKin1 = 1 and Status_CLKin0 = 1 (Holdover), will LMK04816 still monitor all CLKin0, CLKin1, and CLKin2 clock sources? Will activities on any of these three sources impact on the quality of the clock outputs while Holdover is being selected.

    Thanks,
    Tuan
  • 0 in reply to Tuan To
    TI__Mastermind 32575 points
    In pin select mode, the activity on the CLKIN ports will not affect the output clocks while STATUS_CLKIN pins = 1 (holdover mode).