CDCP1803 - effects of divide function

Jamaal_Charles

Other Parts Discussed in Thread: CDCP1803

Hello,

We are considering using the CDCP1803, and are having trouble figuring out what effect dividing the clock down will have on the outputs. Does the duty cycle stay the same (just fewer pulses), or is it 50% duty cycle. Also, does this function add jitter or phase noise. We are just trying to get a handle on that, and don't see it in the data sheet.

Thank you

over 11 years ago

0 Alan O over 11 years ago

TI__Mastermind 32575 points

The divided output clock will have 50% duty cycle. The duty cycle distortion spec should apply for both bypass and divide modes.

The divider will add some noise/jitter since the phase noise will NOT scale down with frequency according to the 20*log(1/N) rule as the output noise floor is the limiting factor. From Figure 2 in the datasheet, the output noise floor is about -154 dBc/Hz at offsets above 100 kHz.

Regards,
Alan

0 Gabe Ayala over 11 years ago

TI__Genius 10320 points

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CDCP1803 - effects of divide function