• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 22 subscribers
  • Views 480 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

cdcm6208 gives nack in i2c mode

Nir Sharony
Prodigy 20 points
Other Parts Discussed in Thread: CDCM6208

Hello,

I'm configuring the CDCM6208 in I2C mode.

sometimes it works and somtimes id doesn't.

When it doesn't, I see that the CDCM6208 gives and ACK on the slave address and the then a NACK on the next byte.

You can see the scope samples in the attachment.  SCL is 20 KHz.

What can be the problem?

  • 0
    TI__Genius 9920 points
    Hi Nir,
    Please refer to Figure 59 to guarantee "VDD_PLL1, VDD_PLL2, VDD_PRI, VDD_SEC all must rise before PDN toggles high". What's more, PDN ramping should be monotonic increasing. If it was not monotonic in power up, initialization would not be done completely. Please try to toggle PDN again, then I2C would work stable.

    In addition, you also could check "7.22 Timing Requirements, I2C Timing" had been achieved.

    Regards,
    Shawn