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LMX2592: multiple LMX2592 PLL over spi not getting confugred

Part Number: LMX2592

Hi,

we are using PIC18F85K22 microcontroller  in our custom hardware.Four LMX2592 are communicated with Micro controller over SPI.

When we configure only one PLL then its getting locked on particular required frequency.

But when we try to configure two PLLs then there will be inconsistency(only PLL will get configured).

so please help us in figuring out the root cause.

SPI CONFIGURATION:

SSP1BUF = 0;
PLL1_50MHZ_LE_SET_DIRECTION= OUTPUT;
PLL2_540MHZ_LE_SET_DIRECTION= OUTPUT;
PLL3_2700MHZ_LE_SET_DIRECTION= OUTPUT;
PLL4_3300MHZ_LE_SET_DIRECTION= OUTPUT;
PLL_SDO_SET_DIRECTION= OUTPUT;
PLL_SCK_SET_DIRECTION= OUTPUT;

SPI1_ENABLE_PIN = DISABLE; // disable SPI port
SSP1STATbits.SMP = 0;
SPI1_RX_TX_BUFFER = CLEAR; // clear SPI buffer
SPI1_INTERRUPT_FLAG = CLEAR; // clear interrupt flag
SPI1_INTERRUPT_ENABLE_BIT = DISABLE; // disable interrupt
SPI1_CLOCK_SELECT_BIT = TX_CLOCK_CHANGES_IDLE_TO_ACTIVE;
SPI1_CLOCK_POLARITY_BIT = CLOCK_POLARITY_IDLE_STATE_LOW;
SSP1CON1bits.WCOL=0;
SSP1CON1bits.SSPM3 = 0;
SSP1CON1bits.SSPM2 = 0;
SSP1CON1bits.SSPM1 = 0;
SSP1CON1bits.SSPM0 = 0; // for sclk = fosc/4
SPI1_INTERRUPT_ENABLE_BIT = ENABLE; // enable interrupt
SPI1_ENABLE_PIN = ENABLE;

Regards,

Biswajit

  • Hi Biswajit,

    How are each of the 4 LMX2592's routed from the microcontroller. Is there switches to make only one LMX2592 get programmed at one time?

    Regards,

    Brian Wang
  • We are not using switch to program one pll at once .As 4 PLLs are connected  with Micro controller through SPI lines.To Program one PLL at a time we use SPI SLAVE SELECT pin.

    Steps:

    1.Make SLAVE_SELECT_PIN OF PLL1(LATCH ENABLE) As RESET and then configure the PLL1

    2.SLAVE_SELECT_PIN OF PLL1=SET 

    3.Make SLAVE_SELECT_PIN OF PLL2 As RESET and then configure the PLL2

    2.SLAVE_SELECT_PIN OF PLL2=SET 

    Regards,

    Biswajit

  • Hi Biswajit,

    If you were to program all the PLLs to the same settings simultaneously, you can connect all the spi interface together. Just to ensure that the spi driver has sufficient strength so that the signal integrity is not degraded.

    If the setting of each PLL is different, you can connect all the SCK and SDI pins together, but the CSB pins must be separated. For example, when you program PLL1, the CSB pins of PLL2, 3 and 4 must be pull-high.
  • Hi ,

    Thanks a lot for your reply.

    I have done as you suggested.Like making CSB PIN of other PLLs as "HIGH" which are not getting not getting configured.

    But  the problem is still there.

    I will be giving one more observation:

    Failure Case:

    Pseudo Code:

    main()

    {

    PLL2_540MHZ_LE=SET;
    PLL3_2700MHZ_LE=SET;
    PLL4_3300MHZ_LE=SET;

    PLL_1_50MHZ_Configuration();

    PLL1_50MHZ_LE=SET;
    PLL3_2700MHZ_LE=SET;
    PLL4_3300MHZ_LE=SET;

    PLL_2_540MHZ_Configuration();

    }

    If i will try to configure 50MHZ PLL1 followed by 54MHZ PLL2  as above ,then one of the PLL will get configure but not the both.

    Success Case:

    main()

    {

    PLL1_50MHZ_LE=SET;
    PLL3_2700MHZ_LE=SET;
    PLL4_3300MHZ_LE=SET;

    PLL_2_540MHZ_Configuration();

    PLL2_540MHZ_LE=SET; 
    PLL3_2700MHZ_LE=SET;
    PLL4_3300MHZ_LE=SET;

    |

    If i will configure 540MHZ PLL2 followed by 50MHZ PLL1, then both the PLLs get locked at the required frequency.

    Please let me know the root cause of the same.

    Regards,

    Biswajit

  • Hi Biswajit,

    in the failure case, is PLL1 locked? after programming PLL2, which PLL did not lock?
    Could you do a more detail debug on this issue, such as use a scope to monitor the SPI activity; decrease the SPI rate; or during configuration of the second PLL, write each register one by one and observe the response from the first PLL. I need more information to be able to pin point the root cause.
  • Hi Noel,
    Thanks a lot for your input.There was few mistakes I was doing because of that it was behaving differently.
    Now ALL the PLLs are getting locked at required frequency.But when i hard reset the hardware only one PLL(3300MHZ) is getting locked,other PLLs are not getting locked.I Need to Program to get lock .
    Please let me know if Any specific configuration or Settings are required on HARD RESET.

    Regards,
    Biswajit
  • Hi Biswajit,

    What do you mean of Hard reset? Did you pull the CE low and then high?
  • Hi Noel,

    I mean to say if i completely switch OFF the board(NO Power supply) and then switch ON the board only one PLL is getting locked.

    To get locked the other PLLs,i need to load & run the  program once again.

    Regards,

    Biswajit

  • Hi Biswajit,

    Which PLL got locked? The last programmed PLL?
    After power is up, make sure the Vcc, the reference clock to the PLL are up and stable before programming.