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LMX2594: Output power vs Temperature (Figure 19): Note about output power impact

AnBer
Mastermind 30210 points
Part Number: LMX2594
Other Parts Discussed in Thread: TIDA-01410

Team,

The Figure 19 in the "Typical Characteristics" section does mention:
"Single-ended output with resistor pull-up and OUTx_PWR = 50. Note that Near 13.3 to 14.3 GHz, output power can be impacted at hot temperature. Consult applications section on this"
http://www.ti.com/product/LMX2594/datasheet/specifications#x9336

Do we have more details to share on this? Can we quantify the impact and quantify what we mean by "hot temperature"?

I checked the Application section (ie section 8 but I have not find anything specific to this).
-Are there some specific design requirements to follow if the Output frequency we want to use is between 13.3 and 14.3Ghz?

Thanks in advance,

Anthony

  • 0
    TI__Mastermind 28011 points

    Anthony,

    "Hot Temperature" means +85C.

    For the worst case temperature and worse case frequency in this range of 13.3 to 14.3 GHz, I saw a drop of 6 dB in output power at 13.8 GHz at +85 C with an OUTx_PWR setting of 50.  If you set OUTx_PWR=15, this dip completely goes away. 

    Regards,

    Dean

  • 0 in reply to Dean Banerjee
    Prodigy 60 points
    Wow, it's a privilege for me to wind up in a discussion involving Dean Banerjee. I read your book about PLL design a long time ago and it really learned me a lot about synthesizers and the associated feedback systems.

    In my application I synthesize in this dangerous zone 13-13.5GHz. The intended product is a satcom terminal in an outdoor enviroment, so constant output power over temperature is actually very important.
    * Is the root cause where this behaviour comes from understood well and can we do something about it external to the synthesizer?
    * You suggest to use the OUTx_PWR=15 setting, but it will have an impact on output power right?
    * Is the behavious less pronounced with inductor pull-up?

    Thanks,
    Bert
  • 0 in reply to Bert De Mulder
    TI__Mastermind 28011 points

    Bert,

    If you enjoyed my book revision, I encourage you to visit my new revision at http://www.ti.com/tool/pll_book and also the PLLatinum Sim tool that is based on this book

    As for this behavior, we saw this in our characterization with the resistor pull-up.  I don't have inductor pull-up data on this and don't know if it would be better, but it seems possible. We do know that the output impedance is of our buffer is lower than 50 ohm for higher settings of OUTx_PWR.  It would seem like an inductor pull-up with resistive pad might fare better than the plain resistor pull-up, but we don't have that data.

    Indeed, lowering OUTx_PWR does cost some output power.   Possible something can be done in hardware to better optimize for this dip in power at hot, but we have not done this yet.

    Regards
    Dean

  • 0 in reply to Dean Banerjee
    Prodigy 60 points

    Hello Dean,


    Regarding the output termination of the chip. I would like to use only one output, and single-ended. The range is 13-13.5GHz. I assume we will use resistor pull-up for the reason we discussed.

    * Can the other output be left open? Does it need to be terminated? Does it need to be pulled up to VCC?

    * How about single-ended output coupling. How is this done best, can we just terminate the complimentary output with a resistor?

    * Any recommendation which output (A/B pos/neg) and coupling network to use to minimize the power loss?

    Thanks

  • 0 in reply to Bert De Mulder
    TI__Mastermind 28011 points

    Bert,

    For a single-ended termination, consider doing something like we do for reference design TIDA-01410.   For the side you use, put the pull-up, and AC coupling cap.   For the unused side, you also need the pull-up to Vcc, and AC coupling cap.  Then terminate this with a 50 ohm resistor.  However, as routing is absolutely critical, specifically to have the pull-up close to the chip, take the unused side through a via to buy more space for the side you want so you can minimize this trace.

    Regards,
    Dean