LMX2594: Phase Adjustment Control Difficulty

Alan Olsen

Part Number: LMX2594
Other Parts Discussed in Thread: TIDA-01410

I am having difficulty achieving desired phase settings. Here is a description of the specific tests and results.

In all cases, Fosc = 100 MHz, Fpd = 50 MHz, PLL_NUM = 0, PFD_DLY_SEL = 2, MASH_ORDER = 2, MASH_RESET_N = checked, MASH_SEED_EN = checked, and VCO_PHASE_SYNC_EN = checked.

Case 1 (same as TIDA-01410 “Phase Synchronization of Multiple PLL Synthesizers Reference Design” section 4.2.2)

RFout = 400 MHz, CHDIV = 24, IncludeChannelDivide = 4, PLL_DEN = 4, Fvco = 9600 MHz

MASH_SEED = 2 + 2 + 2 = 6 produces three 30 degree phase shifts to the left totaling 90 degrees.

Or, MASH_SEED = 3 + 3 = 6 produces two 45 degree phase shifts to the left totaling 90 degrees.

But, MASH_SEED = 6 produces only one 30 degrees phase shift to the left. Is this because MASH_SEED = 6 violates PLL_DEN > PLL_NUM + MASH_SEED? Please explain.

Case 2 (change of RFout frequency)

RFout = 200 MHz, CHDIV = 48, IncludeChannelDivide = 6, PLL_DEN = 6, Fvco = 9600 MHz

Calculations indicate that the MASH_SEED will need to be incremented to 12 to achieve a 90 degree phase shift. The expectation is that MASH_SEED = 2 + 2 + 2 + 2 + 2 + 2 = 12 will yield six phase shifts to the left of 15 degrees totaling 90 degrees. It is also expected that MASH_SEED = 3 + 3 + 3 +3 = 12 will yield four phase shifts to the left of 22.5 degrees totaling 90 degrees and that MASH_SEED = 4 + 4 + 4 = 12 will yield three phase shifts to the left of 30 degrees totaling 90 degrees.

The first MASH_SEED entry of 2 produces a phase shift RIGHT of 45 degrees. The second MASH_SEED entry of 2 produces a phase shift left of 15 degrees. The third MASH_SEED entry of 2 produces a phase shift left of 75 degrees. The fourth MASH_SEED entry of 2 produces a phase shift RIGHT of 45 degrees. The fifth MASH_SEED entry of 2 produces a phase shift left of 15 degrees. The sixth MASH_SEED entry of 2 produces a phase shift left of 75 degrees. This sequence of MASH_SEED values ultimately results in the desired phase shift to the left by 90 degrees but not in the manner that was expected.

The first MASH_SEED entry of 3 produces a phase shift RIGHT of 67.5 degrees. The second MASH_SEED entry of 3 produces a phase shift left of 112.5 degrees. The third MASH_SEED entry of 3 produces a phase shift RIGHT of 67.5 degrees. The fourth MASH_SEED entry of 3 produces a phase shift left of 112.5 degrees. This sequence of MASH_SEED values ultimately results in the desired phase shift to the left by 90 degrees but not in the manner that was expected.

The first MASH_SEED entry of 4 produces a phase shift RIGHT of 30 degrees. The second MASH_SEED entry of 4 produces a phase shift left of 30 degrees. The third MASH_SEED entry of 4 produces an additional phase shift left of 90 degrees. This sequence of MASH_SEED values ultimately results in the desired phase shift to the left by 90 degrees but not in the manner that was expected.

What have I overlooked or misinterpreted?

Suppose that the desired phase shift was 60 degrees instead of 90 degrees. For Case 1, MASH_SEED = 2 + 2 will result in the desired 60 degree phase shift. For Case 2, the combinations that were used do not yield a 60 degree phase shift to the left. If a combination of MASH_SEED values does exist that will create the desired phase shift of 60 degrees to the left, how is that combination calculated or predicted?

over 7 years ago

0 Dean Banerjee over 7 years ago

TI__Mastermind 28011 points

Alan,

When you combine MASH_SEED and VCO_PHASE_SYNC, then this can cause complications because IncludedDivide is NOT considered part of the PLL_N value. You certainly can do this, but from measurements, it is clear that it does not work for all cases. We have no closed form rule to elegantly express which cases it does and does not work for. When it doesn't work, the symptom can be (1) shifts provided MASH_SEED is not too big. After that, it shifts the other way, (2) relationship between MASH_SEED and phase shift can be erratic.

Again, we do not have elegant, high confident rules to explain these cases. In the datasheet what you see are simplified rules of thumb that give a basic idea. If you violate these rules of thumb, it could still shift fine and if you follow them, it doesn't guarantee that the phase shift will be consistent. Nevertheless, I can say that (1) This is about the architectore, not a part to part variation thng (2) The rules give a good idea for most of the situations.

The datasheet says it this way:
• When using MASH_SEED and Phase SYNC together and trying to shift more than 180 degrees, it may be
necessary to increase the N divider further or restrict the modulator order to 2nd order or below in order to get
the phase shift to monotonically increase with MASH_SEED

For the first case:
PLL_N = 9600/50/4 = 48
We observe PLL_DEN < MASH_SEED + PLL_NUM
So it violates a rule and it seems that when MASH_SEED (or the cumulatie value thereof) violates this, you see some unexpected behavior.

This rule is more

For the first case:
PLL_N = 9600/50/4 = 48
We observe PLL_DEN < MASH_SEED + PLL_NUM
This rule is more

In your second case:
PLL_N = 9600/50/6 = 32

So for the second case, I see it violates PLL_N>=45, so this is why you see the erratic behavior.
The first case does not violate the N divider rule
For the 2nd order modulator, PLL_N≥45, for the 3rd order modulator, PLL ≥49, and for the fourth order
modulator, PLLN≥54.

Regards,
Dean

0 Alan Olsen over 7 years ago in reply to Dean Banerjee

Prodigy 20 points

Hi Dean,

Thank you for the prompt reply.

For case 2, I changed Fpd from 50M to 10M to make PLL_N = 160 to satisfy the >= 45 requirement. The test results were exactly the same for the MASH_SEEDS previously described, so it seems that the low PLL_N value is not a contributing factor to the unexpected performance.

If using VCO_PHASE_SYNC in combination with MASH_SEED causes complications that are difficult to predict, how can the initial phase relationship be determined or synchronized without using the VCO_PHASE_SYNC feature?

Alan

0 Dean Banerjee over 7 years ago in reply to Alan Olsen

TI__Mastermind 28011 points

Alan,

The initial phase relationship can always be determined because this is done with MASH_SEED=0.

Now to see how to synchronize this, let's bring some definitions to clarify the discussions:

Define the "inputs parameters" as the following 6 parameters.

1. Fpd (phase detector frequency) or Fvco (VCO Frequency)

2. PLL_N

3. PLL_NUM

4. PLL_DEN

5. MASH_ORDER

6. MASH_SEED

Define "output phase difference" as what you get when the first 5 inputs are kept constant and the value of MASH_SEED is changed from 0 to whatever the value of interest is.

Define "predictable" to mean that the output phase difference is the same over all devices and temperatures.

Define "monotonic" to mean that the output phase is predictable for every value of MASH_SEED AND the output phase difference can be calculated for any value of MASH_SEED as (Phase shift in degrees) = 360 × ( MASH_SEED / PLL_DEN) × ( IncludedDivide/CHDIV )

Now if SYNC feature is used with IncludedDivide=1, outcome is monotonic.

What about cases where IncludedDivide>1 and SYNC is used?

They are always "predictable", but not always monotonic. However, there are many cases that are monotonic. I have found that there are many more monotonic cases if you keep FRAC_ORDER<=2 and have lower N divide (using lower phase detector frequency). Also, have had more luck at higher VCO frequencies.

I did some testing. What I did was to put a nonzero value of MASH_SEED in TICSPro and then push the enter key. This adds 10 to the MASH_SEED and advances the phase (in theory). The table below shows my results.

Fosc	Fpd	Fvco	Chdiv	Fden	Seed	ORDER	Monotonic?	Comment
100	25	8000	16	100	10	2	No	This series tests the impact of Fvco. For the 8 GHz failure, it fails at bot PFD_DLY_SEL=2 and 3
100	25	9000	16	100	10	2	Yes
100	25	10000	16	100	10	2	Yes
100	25	11000	16	100	10	2	Yes
100	25	12000	16	100	10	2	Yes
100	25	13000	16	100	10	2	Yes
100	25	14000	16	100	10	2	Yes
100	10	8000	16	100	10	2	No	This series is trying to make 8 GHz to work. Note that the only success I had was using a nonzero fraction
100	25	8000	16	100	4	2	No
100	25	8001	16	100	4	2	Yes	Nonzero fractions worked, but were noisy.
10	10	8000	16	100	4	2	No
10	10	8005	16	200	4	2	Yes
100	25	8000	16	100	4	2	No
100	10	8000	16	100	4	2	No
100	50	9440	16	100	10	4	No	Below Min Ratio
100	50	9440	16	100	10	2	Yes
100	50	9440	16	100	10	3	Yes
100	25	8000	16	100	10	2	No

Note that when I was at 8 GHz, I had more issues finding monotonic settings than at higher VCO frequencies and reducing the phase detector frequency to even 10 MHz did not fix the issue. But you see I did have success in other cases.

So in summary, if you combine MASH_SEED>0 and VCO_PHASE_SYNC=1, this is absolutely possible to use and there is a broad class of monotonic cases. We have some rules of thumb that make it more likely to have monotonic cases, but following these does not guarantee it to be monotonic and violating these rules does not guarantee it to be not monotonic. So in summary, verification on the bench is needed to be sure that this case will be monotonic.

Regards,
Dean

0 Dean Banerjee over 7 years ago in reply to Dean Banerjee

TI__Mastermind 28011 points

Alan,

Let me add one more thing regarding the case where MASH_SEED>0 and VCO_PHASE_SYNC=1

The first order modulator works with a known pattern and is always monotonic. If the fractional numerator is zero, then the phase can be shifted, but it is limited to steps of VCODIV/CHDIV; in other words, you get no added shifting resolution increasing the fractional denominator beyond 1. However, if the fraction is non-zero, it works reliably. Also, the spurs are not impacted by the MASH_SEED. So if you have a non-zero fraction and you can tolerate the spurs when MASH_SEED=0, then this is the way to go.

For the 2nd order modulator, it seems that there are more issues at lower VCO frequencies. If the fraction is non-zero, typically increasing the N divider value will get the phase shift to be monitonic. If the fraction is zero, then increasing the N divider doesn't seem to help.

Hope this helps.

Regards,
Dean

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LMX2594: Phase Adjustment Control Difficulty