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SN65LVDS104: SE Output termination

Hans
Genius 12865 points
Part Number: SN65LVDS104
Other Parts Discussed in Thread: DS90LV012A

Hello Team,

is it possible to use the SN65LVDS104 as a clockdistribution IC for a 25MHz reference clock with two differential and one single ended output where the SE output is connected as shown below?

Can you provide a phase noise plot for a 25MHz carrier, please? Alternatively some phase noise numbers for 25MHz at 1kHz, 10kHz, 100kHz, 1MHz, 10MHz offset would also be ok.

Thanks and Best Regards,

Hans

  • 0
    TI__Genius 10250 points
    Hello Hans,

    Are you saying you want to use 2 differential outputs and convert 1 diff output to single-ended using the scheme above? I am not sure if this scheme would work, since the LVDS diff output is 350mV diff/1.2V common mode. Basically, the "single-ended"output would (typically) switch between 1.125 V and 1.375 V. You can use a differential to single-ended device, such DS90LV012A, to produce single-ended output, if you are OK with additional delay.

    Regarding phase noise plots, unfortunately we don't have any data beyond what's in the datasheet.

    Regards,
    Yaser