LMK00105: D/S Question & Configure as Inverting Buffer?

Go Bravos

Expert 6090 points

Part Number: LMK00105

Team,

Based off the following lines of the datasheet, the output voltage supply cannot exceed the core voltage supply. What are the consequences if it does?
Is there a way to configure this part as an inverting buffer while using a single ended input? Can this be done by using the recommended input configuration in the datasheet, but feeding the input clock to the CLKin- pin?

Thank you.

over 5 years ago

0 Lane Boyd over 5 years ago

TI__Genius 16845 points

A1. One serious potential consequence could be permanent damage to the device.

A2. Yes, driving the CLKin- input rather than CLKin+ will invert the output.

Kind regards,
Lane

0 zack xing over 5 years ago in reply to Lane Boyd

Prodigy 10 points

Are there other consequences for out of spec output supply voltage? Degradation of output signals, for example?

0 Lane Boyd over 5 years ago in reply to zack xing

TI__Genius 16845 points

Yes, output degradation is possible. This is operating condition is outside of the recommended operating conditions. Even if the device is still functional, you may not achieve the performance guaranteed in the electrical tables.

Kind regards,
Lane

0 Richard Cundiff over 5 years ago

Prodigy 20 points

We will update the design and replace part, but for debugging of the current board.

For A1 below, what other consequences could occur – signal integrity issues?

What would the expected output voltage be when the VDD = 2.5v & VDDO = 3.3v?

A1. One serious potential consequence could be permanent damage to the device.

0 Lane Boyd over 5 years ago in reply to Richard Cundiff

TI__Genius 16845 points

Are you facing issues with the device in your design? What do you observe?

Kind regards,
Lane

0 Lane Boyd over 5 years ago in reply to Lane Boyd

TI__Genius 16845 points

There are ESD DIODES connecting VDDO to VDD. If VDDO exceeds VDD by 0.8V, these diodes will turn on and start to conduct current. There is a 1K resistor which will limit the current. At 3.3V and 2.5V, that is 0.8V, therefore there will not be much current.

As far as the output voltage, 2.5V will not completely turn off the PMOS and will result in high shoot-through current, and as a result the output low voltage will not be 0V. It may be low enough for the application, but will not be guaranteed to work properly. Bottom line, is that the device won’t blow up, but may not function properly.

Kind regards,
Lane

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LMK00105: D/S Question & Configure as Inverting Buffer?