I need a 1:4 buffer in which two LVCMOS inputs are muxed and four outputs are LVDS, in that way as in the block diagram. Can you recommend on such a buffer of TI ?
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I need a 1:4 buffer in which two LVCMOS inputs are muxed and four outputs are LVDS, in that way as in the block diagram. Can you recommend on such a buffer of TI ?
Hello Ohad,
Please check the CDCLVD1204, it is similar to the diagram in your post. While it doesn't have an output enable or a clk enable, it does have two inputs and a clock select pin. Leaving the clock select pin floating is equivalent to disabling the input clocks and holds the outputs at a static state.
Regards,