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Original question:

ClockPro and CDCE925

CDCE913: Use clock pro to generate related frequencies with difference being only the PDIV divider

Lee Fletcher
Prodigy 100 points
Part Number: CDCE913
Other Parts Discussed in Thread: CDCM6208,

I have a table of frequencies that should be generated by CDCD913, and I want to use a 27mhz crystal.

I want to take advantage of the 2 dividers after the PLL output to generate pairs of frequencies.

I want to create a table of the parameters required N, P, Q, R for each pair, and also PDIV for each frequency.

Parameters N and M should the same for both frequencies of a pair.

Since I want the chip to use the PLL, I filled in the blank for Y1 as 1.0 Mhz

Here is a pair of frequencies in Mhz

1.56112 1.80768

Here is another pair of frequencies in Mhz

1.64336 1.88992

If I try to use a pair the "wizard" switches to CDCD925 and uses 2 PLL.

How can I limit the chip chosen and force the use of one PLL per pair?

I will need to generate 4 pairs of frequencies, but when I enter an example set, the Clock Pro program dies.

  • 0
    TI__Mastermind 18070 points

    Hi Lee,

    That is because 1.56112MHz and 1.80768MHz cannot be generated by the same PLL because their least common multiple is beyond VCO range of this device. So you can either generate two frequencies from two PLLs or use CDCM6208 which has fractional output dividers.

    Regards,
    Hao

  • 0 in reply to Hao Z
    Prodigy 100 points

    Ah! I knew that but looked at the problem incorrectly.

    I did the calculations for  Pdiv,  N,   M 'manually' and accepted that the actual frequencies would be off.

    What I failed to do was give Clock Pro the updated values

    Pdiv     N       M    freq           freq_actual
    110    3072    483    1.56112        1.56115189159 ok
      95    3072    483    1.80768        1.80764955868 ok

    I will have to find out what resolution is useful / usable by the CDCE913, but the above values 'coexist' on one PLL.

    Can you tell me what resolution is useful?

    Here are my results when rounding the frequencies

    1.56115189159  ok
    1.80764955868  ok

    1.56115189160  ok
    1.80764955870  ok

    1.56115189200  ok
    1.80764955900  ok

    1.561151890  Clock Pro fails
    1.807649558  Clock Pro fails

    1.56115190  ok
    1.80764956  ok

    1.561152  not the same PLL
    1.807650  not the same PLL

  • 0 in reply to Lee Fletcher
    TI__Mastermind 18070 points

    Hi Lee,

    Sorry I'm not sure what you mean by "useful". If you are looking to see what level of rounding is acceptable, you can first calculate the ppm error ( which = (actual freq - nominal freq) / nominal freq * 1e6), then see if that ppm error is within the range of your expectation.

    Regards,
    Hao