I’m using a CDCLVD1212 and would like the option of turning “off” the outputs of the buffer.
I noticed that Table 1 of the datasheet offers an option for the outputs to be static. I didn’t find the definition of static in the datasheet.
Questions:
Does "Static" mean the outputs are high impedance, or a predetermined logic level, if the last one, do we need pull resistors to set the “static” output?
Would an FPGA high impedance output be a valid “open” for IN_SEL?
Is IN_SEL able to handle dynamic switching between a 0 or 1 and high impedance?