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LMK04826: SYSREF generation with PLLs unlocked

Part Number: LMK04826
Other Parts Discussed in Thread: LMK04828

Hi Team,

We are using the LMK04826 on a number of our boards and we are seeing some peculiar behavior from it using a bypass configuration (dividers only in clock path, PLLs not used/locked).

Specifically, the SDCLKout1 SYSREF pins go from this

to being in phase as shown below when the register 0x106 bit 0 is set to 1 then written back to 0 (similar behavior seen for SDCLKout3).

Is this expected behavior? Are the SYSREF pins only designed to be used when the PLLs are locked?

Sincerely,

Olu

  • What is the output format?  If it is LVDS or HSDS which is AC coupled, and a shunt 560 ohm resistor is placed across the LMK04828 output pins, this this issue go away?

    I've some some cases where some loads of an AC coupled LVDS/HSDS output need a 560 ohm shunt to start-up properly.

    73,
    Timothy