DAC5675A: LVDS or LVPECL differential clock signals can be used for CLK/CLKC input?

Kazuhiko Hirano

Part Number: DAC5675A
Other Parts Discussed in Thread: CDCLVP1208

Hello,

Do customer uses LVDS or LVPECL differential clock signals for DAC5675A CLK/CLKC input?
Datasheet specifies |CLK-CLKC| min = 0.4V and |CLK-CLKC| min = 0.8V.
Usually, LVDS Vod minimum is around 0.25V, it less than the |CLK-CLKC| min.
And looking at TI LVPECL buffer CDCLVP1208 differential output level spec, Voou pp (min) is 0.65Vpp at 3.3V power supply. This means Vod(min) is 0.325V, less than the |CLK-CLKC| min too.
So, if DAC5675A |CLK-CLKC| min spec is true, it seems that it is difficult to support either LVDS or LVPECL clock input.

Best regards,

K.Hirano

over 4 years ago

0 Miguel Lomeli over 4 years ago

TI__Intellectual 1950 points

Hi K,

For the DAC5675A, the smallest differential signal that can be applied to still work under recommended operating condiions is .4Vpp. for questions regarding CDCLVP1208 please use following form(https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum). it's good that the Vod is less than because it gives you room to play with. It's better to be closer to max because the slew rate will improve which then will give you better performance.

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DAC5675A: LVDS or LVPECL differential clock signals can be used for CLK/CLKC input?