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ADS8860: Definition of "conv" and "acq"

user4811888
Intellectual 530 points
Part Number: ADS8860

Hi expert,

please see below diagram in datasheet:

It is very clear:

"tconv" means period of sampling, sample-hold capacitor charging and data converting.

"tACQ" means period of communication of digital code by series interface.

However please check document SBOA443:

It seems to me that "Vconv" is an edge-signal to trigger sample-hold and converting circuit to start, and "Vacq" high→low means converting is done.

That indicates:

When "Vacq"=1, it represents period  "tconv" of sampling and converting.

When "Vacq"=0, it represents period  "tACQ" of communication of digital code.

Why do we make those names so confusing to understand?

  • 0
    TI__Guru 63185 points

    Hello,

    The definitions you use based on the datasheet are correct and acq is the Acquisition (sample) phase and "conv" is the conversion (hold) phase.

    In the simulation file Vacq = 1 indicates it is the acquisition phase.  The Verror signal needs to be settled to <1/2 LSB by the time the acquisition phase is over which is indicated when Vacq transitions to 0.  When Vacq = 0 it is the conversion phase and the input is not connected to the input sampling capacitor while the conversion is happening.  The actual conversion is not modelled as the goal of the model it to verify that the input settles properly within the acquisition timing. The Vconv = 1 pulse occurs immediately before the next acquisition phase to reset the voltage on the sampling capacitor to the proper level before the switch is connected to the input.  

    The deep theory used in this modelling method is explained in this video series:

    https://training.ti.com/node/1139106?context=1139747-1140267-1128375-1139106

    Specifically this one:

    https://training.ti.com/ti-precision-labs-adcs-building-sar-adc-model?context=1139747-1140267-1128375-1139106-1134074