• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Subscribers 47 subscribers
  • Views 386 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

ADS5294: sampling rate

ADS5294: Output Data Rates

Lach Temelkov
Prodigy 110 points
Part Number: ADS5294


Hi,

I am confused about the description and usage  of Output data rates registers 9.6.1.12 from ads5294 data sheet.

If i don't use decimation, the output data rate (in table 21) must be equal to the sampling rate e.g data_rate  must be<00>;

but the data sheet (page 57) says   "Without enabling the decimation filter, the sub-multiple ADC sampling rate feature is used"

Is it not contradicting?

What would be the value of the data rate register when no decimation used -<00> or sub multiples?

 Thanks,

LT                                                           

  • 0
    TI__Expert 7130 points

    Hi Lach,

    Your query is received. Let me assign it to Karthik from our team and he will get back to you soon.

    Regards,
    Abhishek

  • 0
    TI__Expert 4920 points

    Hi LT, 

    DATA_RATE register controls only the output data rate of every channel and not the sampling rate. This is true with or without decimation.

    The sentence you are referring to is an infrequent use-case where input clock is Fs but you want to sample to at Fs/2 or Fs/4 or Fs/8. In such as case, without enabling the decimation filter, you can achieve this just by programming DATA_RATE. However, that would be power-inefficient since higher Fs implies higher power consumption (Fig. 40) and you are just dropping converted samples at the output. You are better off either 1) enabling the decimation filter and reaping the SNR improvements due to noise-filtering OR 2) use a clock divider (1/2 or 1/4 or 1/8) and apply the divided clock to the ADC. 

    In summary, if no decimation is used and your input clock is Fs. If you need Fs sampling, then use DATA_RATE = 00. If you need Fs/2 sampling, use DATA_RATE = 01, and so on. 

    Thanks,

    Karthik

  • +1 in reply to Karthik Nagabhushana
    Prodigy 110 points

    Thanks Karthik that made sense,

    My confusion stemmed from the fact if no decimation is used , and the output sampling rate is say at  Fs/2, the input data rate will be higher than the output data rate, e.g the adc must drop samples as you pointed out ,otherwise internal adc buffer will overflow.

    However, dropping samples without using decimation (e.g. without using a LP filter such as half band) to reduce output sampling rate is not good due to aliasing. That tells me, in my case when i don't use decimation, setting the data_rate_register to say Fs/2, i will have aliasing problem 100%(the spectrum between Fs/2 and Fs/4 will fold over), So the only option is data_rate_register=00 when no decimation is used, and this data_rate register sub multiple settings should not be used without decimation?

    Thanks,

    LT

      

  • +1 in reply to Lach Temelkov
    TI__Expert 4920 points

    Hi LT, 

    Yes. Your understanding is correct. If you are not doing FIR low pass filtering (decimation or custom) in the ADC, then it is recommended to use DATA_RATE = 00. 

    Regards,

    Karthik

  • 0
    TI__Expert 4920 points

    Hi LT, 

    I will close this thread for now. Do consider closing it from your end if it has clarified your question. 

    Thanks,

    Karthik