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Original question:

ADC suggestion

ADC suggestion

Raghunath Pol1
Prodigy 200 points


Hello All,

(1) ADC suggestion - Data converters forum - Data converters - TI E2E support forums

Continue to this post....

need to capture continuously, 3us pulse appearing periodically coming from 2 identical channel.  we are expecting more samples so planning to go with 12bit 10Msps ADC, we are looking for suitable dual/ 2-single channel ADC.. because of high speed we need  process more data. for that attached block diagram circuit fallowing. pls suggest suitable ADC and review connection to MCU. (MCU is fixed)

  • 0
    TI__Mastermind 23830 points

    Hi Raghunath,

    We have the ADC12010 which would work well for your 10MSPS rate, resolution, and input voltage range, however this is only a single channel device so you would need two of these. Another option would be to use the ADC3641 with some front end which reduces the 0-3.3V range into the acceptable range for this device. The benefits of this device are a lower power consumption, dual channel device, as well as the LVDS interface which should be easier for implementing to the FPGA.

    Regards, Chase 

  • +1 in reply to Chase W
    Prodigy 200 points

    Thanks alot Chase W for ADC suggestion .. Pls comment on RAM size required and FPGA  to process this data.

    Regards,

    Raghu

  • +1 in reply to Raghunath Pol1
    TI__Mastermind 23830 points

    Hi Raghunath,

    Unfortunately I'm unable to provide a recommendation on these items for you. I would suggest asking on either the Xilinx or intel FPGA forum as a start for recommendations on these. They will know the ability of their FPGAs significantly more than TI does, which will be the better option as they might suggest you a solution without external memory requirements for example. I will mention that depending on the ADC you choose, the captured data size will vary (with the ADC resolution, sample rate, etc) so the amount of memory corresponding to the 3us pulse (and any time before/after) will have to be calculated for each ADC separately. The memory constraint is also based upon whether the application is real time processing or if the application requires storing data. 

    Regards, Chase