Other Parts Discussed in Thread: DAC80508,
Hi
I was curious to understand the block diagram which you have given in the datasheet: My design requirements are the following:
1. Output impedance of a specific active DAC channel (1 among 16 ) should be very low say less than (<0.1 ohm).
2. Output impedance of all other/inactive DAC channels (15 among 16 ) should be very high, say less than (>1G ohm).
3. Programmable selection of a channel for buffered output voltage (0 to 5V) with very low input impedance.
Any help will be appreciated.
Thanks and Regards,
Deepak