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Original question:

DAC8741H: SPI Communication Issues

DAC8741H: Trouble putting HART data from the HART Modem (DAC8741H) FIFO_D2M buffer onto the HART bus to send data from host controller to the slave device

Hairuo Sun
Prodigy 10 points
Part Number: DAC8741H
Other Parts Discussed in Thread: DAC8740H

Hi, I got the master microcontroller successfully writing data into the Modem FIFO_D2M buffer through SPI protocol. However, I weren’t able to put the data in the FIFO register onto the HART bus to send data to a slave device (that talks HART). 

In fact, the CD bit on the MODEM_STATUS register is never set to high. Is CD bit automatically triggered when you connect a device? Or do I need to set some other registers in order for the HART modem to detect a slave device?

Any advice on how I should proceed to resolve this bug? Feel free to let me know if my programming logic is correct and how I can correct it. Or if there is any advice on how to debug the hardware is helpful, too

On what I have written in the code to configure/set registers:

  1. FIFO_LEVEL_SET register: set M2D modulator FIFO alarm threshold = 16, set D2M demodulator FIFO alarm threshold = 10. 
  2. MODEM_IRQ_Mask register: blocked parity, all 6 fifo, CD, CTS events. 
  3. FIFO_D2M/FIFO_M2D registers: parity bit set to 1 (for 8 bit data), and FIFO_D2M register populated with data I want to send to the slave device
  4. MODEM_CONTROL register: RTS set to 1 and CTS is also set to 1.
  5. MODEM_STATUS register: observe that CD bit is never high.
  • 0
    TI__Guru* 98155 points

    Hairuo,


    The CD bit should assert whenever a sinusoid appears as the HART signal. I would use an oscilloscope to check to see that the HART sinusoid appears at either MOD_IN or MOD_OUT pins.

    Generally, the following is the way that the HART communication would go (sending data with the device). Start with setting RTS to indicate that the device wants to transmit data. The RTS should start up the modulator output. Receive the CTS to show that no other devices are trying to send data at the same time. I think it would be best to wait several bit times to allow the carrier signal to be established.

    Then write to the FIFO to send the data. This should go out automatically as RTS has started the HART carrier. When the FIFO is empty, de-assert RTS to free up the HART transmission. There may be some latency from FIFO to HART, so I think you need to wait through one character time after the FIFO is empty to de-assert the RTS.

    Let me know that if that helps. If it doesn't you can certainly post back to this thread and we can continue with this discussion.


    Joseph Wu

  • 0 in reply to Joseph Wu
    Prodigy 10 points

    Hi Joseph,

    Thank you for your response!

    Software side: 

    I have tried the method you recommended by settings RTS high first, and verified that CTS is also raised high. However, the MODEM_STATUS register CD bit is still not raise high even after I wait for 10 seconds.

    I tried to verified if the HART slave device is working by using an off-the-shelf HART modem(connect to PC through USB) to read data from the slave device, and it can properly read data. 

    Do you think it can be a HART device setting issue? What other things on the software can I try? 

    Hardware side: 

    I have used the oscilloscope to the HART sinusoid data, but I don't know what I'm looking at. I can also loop in some of our hardware engineer working on this. 

  • 0 in reply to Joseph Wu
    Prodigy 10 points

    Also, the following is a picture that one of our hardware engineer shared with me regarding the MOD_IN/MOD_OUT signal.

    The scope should have a 1.2kHz sine wave on the screen whenever we are not sending data, and it should shift to a 2.2kHz wave to represent data being sent in binary (0= 1200, 1 = 2200). However, we are only observing the 1.2 kHz data, and didn't observe any 2.2 kHz data yet. 

    Feel free to share any thoughts for hardware debugging. Like, is it because how we set up the 4-20mA loop, etc?

  • 0 in reply to Hairuo Sun
    TI__Guru* 98155 points

    Hairuo,

    At this point, are you not able to send data? Or do you not receive data either? I just wanted to check. One thing that I wanted to point out is that the CD signal for carrier detect should be very quick (like about 1ms).

    By setting the RTS in the register field, the modulator turns on, and you'll see the sinusoid which is what I think you see. Once that happens, you should be able to write the data to the device's output FIFO. If you have no other HART transmissions outside the device, I think you may be able to just write to the output FIFO anyway and I think the data appears on the MOD_OUT.  Can you test that?

    I sent an email to one of the digital designers to check. In the meantime, can you send me a schematic with the connections to the DAC8741H? I just want to see how it's connected.

    Joseph Wu

  • 0 in reply to Joseph Wu
    Prodigy 10 points

    Hi Joseph,

    Apologize for my late response. And thank you for your reply! I verified that I'm able to send the data (and data does appears on MOD_OUT), but unable to receive. 

    The data that I send out is: 0xff, 0xff, 0xff, 0xff, 0xff, 0x02, 0x80, 0x00, 0x00, 0x82. The reason that I send out these sets of data is based on: https://kovleventer.com/blog/hart_intro/. I am reading the datasheet for the Meter IFC050 to see if the first command that I send was wrong. 

    I have asked one of our hardware engineer to provide the schematics, I'll share it here with you as soon as I receive the diagram!

    Best,

    Hairuo

  • 0 in reply to Hairuo Sun
    TI__Guru* 98155 points

    Hairuo,

    If the device isn't receiving, first I would use an oscilloscope to see if the HART sinusoid is appearing on the RX_IN, or RX_INF pin (depending on what input you are using. There are sample schematics that should show what the inputs should look like (see figures 32 and 33 on page 32 of the datasheet). If you can see the HART sinusoid, then check to see if the CD pin triggers when the sinusoid appears.

    Let me know when you get the schematics.

    Joseph Wu

  • 0 in reply to Joseph Wu
    Prodigy 10 points

    Remove the HART schematic because it's an internal documentation. If needed, I can send in a private DM. 

  • 0 in reply to Joseph Wu
    Prodigy 10 points

    We are able observe that the RX_IN is showing HART sinusoid. We haven't checked the RX_INF pin, do u know why we need to check RX_INF pin?

  • 0 in reply to Hairuo Sun
    TI__Guru 54833 points

    Joe is reviewing and will respond today.

  • 0 in reply to Hairuo Sun
    TI__Guru* 98155 points

    Hairuo,


    Sorry, I was out of the office yesterday. I wanted to check the RX_IN just to see if you were getting a signal on the pin. I asked about the RX_INF just in case you were using the external filter (this is an optional external input if you use an external HART filter). The schematic looks like everything is connected correctly.

    Can you put up a scope photo of the signal at RX_IN? I just want to see that the magnitude is large enough and that the sinusoid is the proper frequency.

    After that can you set the RTS and then try to read the CD? That should turn on the MODOUT and I think should detect the carrier. I just want to make sure that the device does react to a sinusoid and detect it correctly. (Incidentally, I had mentioned a CD pin in a previous post, and I'd forgotten this was the DAC8741H and not the DAC8740H).


    Joseph Wu

  • 0 in reply to Joseph Wu
    Prodigy 10 points

    Hi, our HART chip right now has some hardware issues so I can no longer generate a sinusoid data. I'll keep you updated once we got it working and share a picture with you!

    Although, I'm wondering what is the expected frequency of the sinusoid?

  • 0 in reply to Hairuo Sun
    TI__Guru* 98155 points

    Hairuo,

    For the HART sinusoid, the amplitude is about 500mVpp. The FSK portion of the signal should be 2.2kHz for a zero and 1.2kHz for a one. 

    Let me know if you have more questions, and definitely let me know once you get the hardware up and running again.

    Joseph Wu

  • 0 in reply to Joseph Wu
    Prodigy 10 points

    Hi Joseph,

    Attached are pictures of the HART sinusoid waves. 



    This is the picture of the HART Command 0 transaction:





  • 0 in reply to Hairuo Sun
    TI__Guru 54833 points

    Joe will respond tomorrow after the US holiday.

  • 0 in reply to Hairuo Sun
    TI__Guru* 98155 points

    Hairuo,


    I'm not sure why you're not able to get the data out of the DAC8741H. It looks like there is a HART signal, and the schematic looks correct.

    I do want to make sure that the HART signal is getting to the device. When you measure the HART signal with an oscilloscope, can you please check this at the device MOD_IN input? This would be at the device side of C24, shown here:

    If you can see the HART signal, and it is large enough in magnitude, then you should get the CD indication. On the DAC8740H, this would have been a pin, but on the DAC8741H, this is a register read of the MODEM STATUS register. Try reading this register to see what comes back. Just in case, I would read the MODEM CONTROL register to make sure the modem is enabled.

    Just in case there's something wrong with the CD indication, you may want to try to read some of the other registers to see if there's some communication coming through anyway. Reading the FIFO_D2M register should give you the data being put onto the FIFO, and you can check to see if the FIFO is really empty or if it is filling by checking the FIFO_LEVEL.

    I would also look at CLKO to make sure the internal oscillator has turned on. There are three digital pins that used pull up resistors. The value of these resistors is 1MΩ, but I'd reduce these just in case there is some leakage current. A leakage current of 1uA would cause a 1V drop below IOVDD. I would use something like a 10kΩ pull up just in case.


    Joseph Wu

  • 0 in reply to Joseph Wu
    TI__Guru* 98155 points

    Hairuo,

    In the previous post, I wrote it wrong - the FIFO_M2D is the receive FIFO. That's the one you need to check. 

    Joseph Wu