ADC12DJ3200EVM: External clock mode not working even after hardware modifications specified

Hi All,

I am trying to drive an ADC12DJ3200 using an external clock, I am providing a 614.4 MHz external clock for driving the ADC and have also done the hardware modifications for the same. ( Removing C50, C51, R67 and populating R67, C49, C52 according to ADC document.) I am providing this clock to the J18 DEVCLK and J22 LMCLK port of ADCEVM as mentioned on pg 21 of ADCxxDJxx00 Evaluation Module User's Guide (Rev. A)  However, I tried running the ADC in external mode after the hardware modifications but got this error (screenshot attached).

I have couple of questions regarding this operation

1) Are there any other software/hardware modifications to be done after this to avoid the error.

2) According to document the minimum frequency of driving clock should be 800 MHz, is that true and is it not possible to drive it with a lesser frequency clock. ( We can go for a higher external clock, but just asking for clarity purposes.

Thanks for your consideration and looking forward to your response.

Thanks,
Vaibhav.