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DAC39J84EVM: Driving DAC using an external clock: not getting signal out

Part Number: DAC39J84EVM
Other Parts Discussed in Thread: LMK04828,

Hi All,

I want to drive DAC39J84EVM using an external clock. For this purpose, I am providing a 20 MHz external clock (square pulses) using signal generator (oscilloscope). I am providing this clock to CLKIN SMA connector (J17) on the board. After this I run the DAC GUI in external mode, and try to generate a 2 MHz signal from the DAC using HSDC pro, however I am not getting any signal out. The onboard clock method still works and can output a signal out but not with the external mode. I am able to also see the clock output from J13, so looks like clock is being provided to the LMK04828, but I am not able to get signal out from the output of DAC.

Are there any other modifications to be done in addition to this for driving DAC using external clock? Also, what peak to peak voltage is to be applied for the clock sent tot he DAC?

Thanks and Regards,

Vaibhav Jain.

  • Vaibhav,

    This device has a minimum serdes rate of 781.25Mbps. You are probably way below this with your DAC configuration. What settings are you using? What platform is sending data to your DAC EVM?

    Regards,

    Jim

  • Hi Jim,

    thanks for the reply

    So I am using the DAC with TSW14J56 Rev E board as the generator and using HSDC Pro for software support. I am sharing screenshot of my setup the DAC GUI settings and the HSDC Pro snapshot for reference. I have taken your point into account and changed the clock from 10MHz to 100 MHz ( sine pulses) to make serdes line rate 2000 Mbps, however I am still unable to get a 10 MHz signal out of DAC. I am also attaching the config file for reference. Please can you tell what could be the issue now.

    Thanks and Reagrds,

    Vaibhav.

  • Vaibhav,

    The external clock frequency needs to match the DAC output rate, not the DAC data input rate. Switch your clock frequency to 400MHz and everything will work just fine!

    Regards,

    Jim 

  • Hi Jim, 

    thanks for the reply.

    I changed the interpolation so that DAC output rate becomes 100 which matches the external clock frequency, however the signal is still not out. Attaching the screenshot for the same

  • Since the FPGA clock needs to be 200MHz, you will need to provide a 200MHz clock and divide  this down by 2 for the DAC. Your LMK clock output settings should look as follows:

  • Hi Jim
    Thanks for the reply. Apologies for late response as I was away for the Easter break.

    I have implemented your suggested settings for the  LMK clock output settings. Currently I have a signal generator which can generate sine waves  maximum up to 100 MHz so I have changed the number of SerDes lanes from 4 to 8 to get 100 MHz FPGA clock and then put the LMK clock settings as mentioned in the previous reply.

    I am still not seeing signal out of the DAC. I am attaching screenshots for the DAC GUI settings, LMK clock output settings and the config file of the DAC. 

    Are there any other modifications required for this setting?

    6443.DAC_External_config.cfg

    Thanks and Regards,

    Vaibhav Jain.

  • Vaibhav,

    Due to the PLL used by the current firmware, the TSW14J56EVM requires a 200MHz clock when using a 100MHz clock for the DAC. Change your DAC input clock to 101MHz. With this clock rate, the TSW14J56EVM requires 101MHz clock. Then go to the LMK clock outputs tab and make the change shown in the attached document.

    Regards,

    Jim

    Use 101MHz for DAC Data Input Rate.pptx