Hello!
How do you use the Root-Mean-Square module in the ADS7128?
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The procedure for using the RMS module is outlined in the steps below:
Shown in the table below is an example of an RMS computation and what is written to each register according to the steps outlined above, using analog input Channel 0, 4096 samples, No DC subtraction, in Autonomous Conversion mode.
Please reference data sheet to see what each individual bit in each register is configuring.
Step |
Register |
Register Address |
Register Value |
Function |
1 and 2 |
RMS_CFG |
0xC0 |
0x01 |
RMS calculation on CH0, Do not subtract DC, Number of samples = 4096 |
3 |
GENERAL_CFG |
0x01 |
0xA0 |
Enable RMS computation RMS_EN = 1, No CRC, STATS_EN, No Comparator, normal conv start, default ch config, no cal, no reset |
4 |
SEQUENCE_CFG |
0x10 |
0x00 |
Start Conversions in Autonomous mode. |
4 |
OPMODE_CFG |
0x04 |
0x00 |
CONV_MODE = ‘00’ |
4 |
PIN_CFG |
0x05 |
0x00 |
Configure channels as Analog Inputs |
4 |
AUTO_SEQ_CH_SEL |
0x12 |
0x01 |
Enable analog inputs for sequencing. This selects channel AIN0 as the only channel in the sequence |
4 |
SEQUENCE_CFG |
0x10 |
0x01 |
Select Auto-Sequence mode |
4 |
OPMODE_CFG |
0x04 |
0x20 |
Configure Sampling Rate of Analog Inputs |
4 |
SEQUENCE_CFG |
0x10 |
0x11 |
Enable Autonomous Monitoring (SEQ_START = 1b) |
5 |
SYSEM_STATUS |
0x00 |
|
Wait until 4096+40 conversions have happened, or monitor status for RMS_DONE on bit 4 = ‘1’ |
5 |
SEQUENCE_CFG |
0x10 |
0x01 |
Stop the sequencer |
6 |
RMS_LSB |
0xC1 |
|
Read RMS result from RMS registers |
6 |
SYSTEM_STATUS |
0x00 |
0x10 |
Clear the RMS_DONE bit |
6 |
GENERAL_CFG |
0x01 |
0x20 |
Disable RMS module |
A similar flow chart may be used for different configurations. Different number of samples, input channels, sampling frequency, subtracting DC value, or any other available configurations can be achieved by setting the appropriate bits on the registers.
Manual mode follows a similar set of steps. The difference is you need to read the data each time to trigger a new conversion start. As per datasheet section 8.4.2 "A new conversion is initiated on the ninth falling edge of SCL (ACK bit) when the last byte of output data is read." so you would need to read out the data for the number of RMS samples requested (1024, 4096, 16384, or 65536 in the configuration) plus an additional 40 conversions before the RMS_DONE flag will be set. In autonomous mode the ADC will be making conversions even if the master device is not reading them, and the RMS result will be available on the RMS_LSB and RMS_MSB registers once the necessary number of conversions have been made.
What we found to be a common missing step when using the RMS module is that to reinitiate another RMS calculation, the RMS_EN bit should be cleared (set to 0) and then set back to '1' for the next calculation in the GENERAL_CFG register.
Best Regards,
Angel