• State TI Thinks Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 48 subscribers
  • Views 226 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADC12DJ3200EVM: Custom use of TSW14J56 and ADC12DJ3200EVM

Daniel Flores
Prodigy 10 points
Part Number: ADC12DJ3200EVM
Other Parts Discussed in Thread: TSW14J57EVM, TSW14J58EVM

Hello everyone,

With the TSW14J56 and ADC12DJ3200EVM I want to perform my own FPGA VHDL circuitry with this boards. They actually have their own software (HSDC Pro, that you provide), but want to know if some IDE can allow me to do what I want or I am restricted to use only the software that you provide?

See, the thing is that I want to have a specific sampling window synchronized with an external signal. The signal of interest is a pulse of 1.2 GHz or 3 GHz signal with about 6 us width, appears once in a 1 ms interval (that is the size of sampling window that I want to find when this signal appears). Maybe the image helps with the concept. Of course The ADC12DJ3200EVM is fast enough for this 1.2 or 3 GHz signals in time domain, about the amount of data I think a FIFO based data management could be manufactured, all with the same FPGA of the TSW14J56 (it uses an Altera JESD204B), but I don't know which IDE can allow me to work at this level with the TSW14J56 and ADC12DJ3200EVM.

Can you help me?


  • 0
    TI__Guru* 91947 points

    Daniel,

    TI no longer supports the TSW14J56EVM as it is now obsolete. The firmware developed for this platform was done by a third party, which no longer supports TI. The board has a JTAG connector that will allow you to download your own custom firmware. The only thing TI can offer/suggest is to maybe use the trigger feature the board has. More info about this can be found in the attached User's Guide.

    Regards,

    Jim

    SLWU087=1=TI PDF=en-us (3).pdf 

  • 0 in reply to jim s
    Prodigy 10 points

    Hello Jim,

    Thanks for the fast answer. About it:

    "TI no longer supports the TSW14J56EVM as it is now obsolete. The firmware developed for this platform was done by a third party, which no longer supports TI."

    1. What about the TSW14J57EVM, can be helpful for what I want?

    2. Does TI have another evaluation board or device that can help me with what I need to achieve ("... to have a specific sampling window synchronized with an external signal. The signal of interest is a pulse of 1.2 GHz or 3 GHz signal with about 6 us width, appears once in a 1 ms interval, that is the size of sampling window that I want to find when this signal appears")?

    Regards,

    Daniel

     

  • 0 in reply to Daniel Flores
    TI__Mastermind 20635 points

    Hi Daniel,

    TI has no off the shelf solution fast enough for a gapped period capture as you are describing. Switching to the TSW14J57EVM will provide no additional benefits as the result will be the same from our software support perspective.

    I believe the IDE for the intel FPGA on the TSW14J56EVM is called Quartus. The TSW14J547 also contains an Intel FPGA so I believe the same 'Quartus' software is what is used. The TSW14J58EVM uses a Xilinx FPGA and Vivado is used for programming that FPGA.

    The limitation here is not due to the TSW14J56EVM but rather our software is not designed for gapped periodic captures as you are describing. The only way this is possible will be to create custom FPGA code to store X number of samples of your 1.2-3GHz pulse after each 1ms periodic pulse which is received.

    Regards, Chase