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TSW14DL3200EVM: FPGA Base Starter Project

Part Number: TSW14DL3200EVM

Tool/software:

Are there any FPGA base starter designs for the TSW14DL3200EVM, DAC123200EVM, ADC14DL3200EVM boards. I saw the post mentioning the firmware was developed by a third party, but there must be a general "hello world" starter design with a xdc file at least? This is a standard with most FPGA evm boards in this industry.

Thanks,

Dennis Bearden

  • Hi Dennis,

    Keep in mind our data capture boards are not meant to be as a development kit. We develop these boards strictly to capture data and parse it over to the PC or laptop in order to display the converter's performance.

    Typically customers would purchase a Xilinx development kit or similar where you would use Vivado SW tools in order to develop your own FPGA FW.

    Let me look and see what we might have for you to start with.

    Give me a few days to get back with you.

    Regards,

    Rob

  • Hi Dennis,

    We unfortunately don't have a reference design in shareable form. The third party firmware is a closed architecture that is distributed only as a bitfile (to enable the evaluation platform).

    That said, the core of the capture datapath is the Xilinx HSSIO IP, which can be autogenerated using Vivado's IP wizard. At bitrates higher than 1.25Gbps, the wizard will create an IP configured for native mode, and the XDC is also auto-generated as you can enter the pin/clock connections into the wizard.

    Regards,

    Ameet

  • Thanks Rob, I really appreciate any help you can give!