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ADS1263: Bandwidth of the PGA input ?

Part Number: ADS1263

Tool/software:

I try to evaluate the peak to peak noise in the PGA differential inputs.

What is the differential transfer funciton of the differential PGA input ?

We have only the feedback capacitor value but we don't know the feedback resistor value, so impossible to know the first order cutting frequency of this input.

Maybe it depends on the PGA gain if some resistors are swiched ?

Thanks.

  • Hi Damien,

    The noise on ADS1263 ADC is mainly filtered by the digital filter inside the ADC, you can find the transfer function of the internal SINC digital filter in the equation (14) on the page 44 of ADS1263 data sheet, and also you can find the SINC filter bandwidth in the table 9-4 in the same data sheet. The bandwidth of the digital filter is related to output data rate of the ADC and the order of the filter.

    I have seen you post another query for ADS1263 in another thread, please try to post all of your questions for the same device into the same thread on the E2E forum in the future. Thanks.

    BR,

    Dale

  • I am not talking of the digital filters, i am talking of the PGA analog differential input : what is the cuttoff frequencies here (CommM / DiffM) ? Very high ? No cuttoff frequency at all only AOP bandpass ? Switched resistors are hidden here. It should depend on the gain.

    My other question has nothing to do with the PGA inputs there is no reason to mix them.

  • Hi Damien Buisson,

    Can you help us understand why you need this information?

    The PP noise is already provided in the ADC datasheet, so you do not need to calculate it. This noise includes the noise of the ADC and PGA, and is measured noise given the conditions stated in that section i.e. not theoretical or simulated noise.

    If I recall, the noise density of the PGA is somewhere around 7nV/sqrt(Hz)

    -Bryan

  • Hello Bryan,

    When designing an analog external differential amplifier, like the internal PGA, there is a cutting frequency due to feedback resistor and capacitor.

    Usually i choose the feedback resistor to create a first pole filter.

    This filter allows me to integrate the noise at the input and thus to know the noise in the output diferential analog value.

    Thus this filter cutoff depends on the resistors choosen.

    In the datasheet we don't have the PGA noise performance, we have only "ADC" noise performance page .

    At the beginiing of the datasheet we have Noise : 7 nV RMS (2.5 SPS / Gain = 32). This means peak to peak is 7n * 6,6 * 32 = 1,478 µV at the ADC output ?

    We have some curves of noise 7-12, 7-13 : that's not a lot if i have a number of samples per second different i can't know how much noise i have in the output data.

    How to design the input anti-alias filter with that ? What cutoff frequency i have to choose ?

  • Hi Damien Buisson,

    As I mentioned in my previous post, the noise specified in the datasheet is a combined noise figure of the ADC and PGA noise. So those values in Table 8.8 include the PGA noise, and those values are measured noise at the ADC output that is then referred to the input (note here when I say "ADC", I am referring to the signal chain inside the device that includes the ADC + PGA)

    Regarding the anti-aliasing filter: here are some guidelines with respect to how to choose the filter components based on the delta-sigma modulator frequency and other system-level parameters that you decide/choose: https://e2e.ti.com/support/data-converters-group/data-converters/f/data-converters-forum/955466/faq-delta-sigma-adc-anti-aliasing-filter-component-selection

    -Bryan