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DAC8740H: DAC8740H

Part Number: DAC8740H
Other Parts Discussed in Thread: RM48L540, HALCOGEN,

Tool/software:

Hi Team ,

I am working on HART protocol by using DA8740H .

I am using RM48L540 MCU and to configure that MCU I have HALCoGen software 

my issue is if I am sending response to connected master but it is giving framing and parity error .

but when I am debugging till HART IC(i.e. DAC8740H )it is sending proper response but at master end it is showing Framing and Parity Error .

HALCoGen config 

Slave and Master communication debug 

  

@ Master end I am using pepperl and fuchs hart modem

pepper3.txt
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Byte Mode pepper.OUT
Time Stamp, Delta-T, Field, Data, Status, Flags,
00000000, 0.00, Unknown, 0x00, 0x00, 0x00
0121A23C, 0.00, Preamble, 0xFF, 0x00, 0x00
0121A251, 9.01, Preamble, 0xFF, 0x00, 0x00
0121A266, 9.01, Preamble, 0xFF, 0x00, 0x00
0121A27C, 9.44, Preamble, 0xFF, 0x00, 0x00
0121A291, 9.01, Preamble, 0xFF, 0x00, 0x00
0121A2A6, 9.01, Preamble, 0xFF, 0x00, 0x00
0121A2BC, 9.44, Preamble, 0xFF, 0x00, 0x00
0121A2D1, 9.01, Preamble, 0xFF, 0x00, 0x00
0121A2E6, 9.01, Preamble, 0xFF, 0x00, 0x00
0121A2FC, 9.44, Preamble, 0xFF, 0x00, 0x00
0121A311, 9.01, Preamble, 0xFF, 0x00, 0x00
0121A327, 9.44, Preamble, 0xFF, 0x00, 0x00
0121A33C, 9.01, Preamble, 0xFF, 0x00, 0x00
0121A351, 9.01, Preamble, 0xFF, 0x00, 0x00
0121A366, 9.01, Delimiter, 0x02, 0x00, 0x00
0121A37C, 9.44, Address, 0x81, 0x00, 0x00
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

and finally my schematic diagram for analysis

MCU-DAC-HART.pdf

  • Hi Ankush,

    Please note that the DAC8740H uses 8O1 UART format, meaning the device expects 1 start bit, 8 data bits, 1 odd-parity bit, 1 stop bit.  This would be a total of 11 bits per databyte.  Are you seeing that from your master controller? The configuration you shared is unclear.

    Thanks,

    Paul