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ADC12QJ1600: ADC12QJ1600 in JMODE0

Part Number: ADC12QJ1600
Other Parts Discussed in Thread: TSW14J58EVM, TSW12QJ1600EVM,

Tool/software:

Hello!

I'm trying to read ADC12QJ1600 with an FPGA. I'm using the TI evaluation boards TSW14J58EVM and TSW12QJ1600EVM. I have turned off additional data scrambling. In table 9-20 of the documentation (ADC12QJ1600.pdf) we find a sample decoding scheme for a 64-bit data transfer in JMODE0. It though turns out, that the nibble and sample ordering is encoded.

I have guessed the encoding and obtained consecutive samples, but I do not feel authorized to present the decoding scheme. Is this device intended for a commercial use or reserved for military and thus the information is classified? I still have a +-16 LSB noise and I suspect that there could be another layer of data encoding /scrambling behind it.

Best Regards

Pawel

  • Hi,

     

    Thank you for choosing TI High Speed Converter products. I am sorry to inform that our applications team for high speed data converters does not have the bandwidth available to support University inquiries at this time. If resource bandwidth becomes available, we will follow up with this question.

     

     

    Regards,

    Geoff