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Original question:

ADS1247 SYNC

ADS1247: START and SYNC Commands

George Sarkees
Prodigy 20 points

Part Number: ADS1247

Tool/software:

I am trying to optimize current by keeping only enabling START high only when necessary.  I am not using DRDY just waiting the appropriate time after START to read the data as per the sampling rate.

I am not sure how START and sending the SYNC command work together along with when data conversion occurs. I would like to know if I will get valid data by performing the tasks as follows with the settings PGA128 and 1000 SPS:

  • START HIGH
  • wait 7uS (much greater than 3x tosc)
  • send SYNC Command 
  • START LOW
  • Wait 3mS (spec calls for 1.138ms min for conversion, time is not an issue here)
  • Read data

It is not clear if a conversion will take place since START was pulled low after the SYNC command. Would I have to send SYNC command first and then START HIGH? It is not clear that if start is turned off after sync if the converter will provide an accurate conversion. Will START have to be taken high again after the SYNC Command in order for a conversion to take place? Or will it occur after the end of SYNC when START is low?

  • 0
    TI__Guru 56611 points

    Hi George Sarkees,

    You can see from the datasheet that when START is low, only certain commands can be issued (SYNC is not one of them).

    If you want to control conversions, you should use the START pin or commands, not both. In your case, I think it makes more sense to just use the START pin as shown in Figure 70 below. Let me know if that makes sense

    -Bryan

  • 0 in reply to Bryan Lizon86
    Prodigy 20 points

    Hi Bryan,

    I noted that when SYNC is not sent, there are certain times when I get inconsistent ADC conversions. These inconsistencies occurred 20-30 minutes after constant conversions and then stopped. Adding the SYNC command solved this problem. 

    The other issue is that I need to use START control VREFOUT. VREFOUT turns on the circuit that is being sampled for conversion and would like to leave START on for the least amount of time required to save current. That is why I use both. 

    When START is taken low after the SYNC command, has the conversion already begun or would I have to leave START on during the conversion to keep VREFOUT on?  

    If I just pulse START as per the spec as you suggested, VREFOUT will be off immediately. Has the converter already sampled the signal or does VREFOUT need to remain on during the conversion process.

    If I use my sequence, how long after SYNC would I have to leave START enabled for a valid conversion since VREFOUT needs to be on for the circuit that is being sampled?

    When is SYNC required and how often should I execute it to get valid conversions? I know that the filters are reset, and this operation occurs when START goes high, but I get inconsistent results if I don't force SYNC.

    Thank you,

    George

  • 0 in reply to George Sarkees
    TI__Guru 56611 points

    Hi George Sarkees,

    You should not be having the first issue you described, I don't think the SYNC command is solving that issue, just masking it. In other words, you should be able to use the START pin to control conversions without any need to issue a SYNC command

    George Sarkees said:
    These inconsistencies occurred 20-30 minutes after constant conversions and then stopped

    What do these inconsistencies look like? Is it just bad data for a few conversions? If so, how many conversions?

    And then you say they "stopped" - is that to say that the issue went away?

    You previously said that you were not using the DRDY signal, but this most recent statement says you have "constant conversions". I assumed you were toggling the START pin every time you wanted a new conversion (similar to Figure 70), can you clarify what exactly you are doing?

    Regarding VREFOUT: see the VREFCON bits in the register map, where the VREF can be either always on or will stay on while a conversion is in progress and power down if the START pin is low (assuming the conversion has completed). In either case VREFOUT should be on while the device is converting, so there is no need to manually control this process

    -Bryan

  • 0 in reply to Bryan Lizon86
    Prodigy 20 points

    Hi Bryan,

    Here is a chart of the issue. After 23 minutes, everything is fine. Then it gave erroneous conversions for four minutes and then was good for the rest of the hour-long test. It was a very repeatable issue, occurring at random times, sometimes twice within the hour of the same test. The other plots are two other ADC's.

    The only change I made was adding sync and it never happened again. Not sure what is going on. 

    Yes, we are toggling START every 30 mS for a conversion. So this is what I'm doing now and everything works fine.

    • START HIGH
    • wait 7uS (much greater than 3x tosc)
    • send SYNC Command 
    • Wait 3mS (spec calls for 1.138ms min for conversion, time is not an issue here)
    • START LOW
    • Read data
    • Wait 30mS
    • Repeat

    I would like to go to:

    • START HIGH
    • wait 7uS (much greater than 3x tosc)
    • send SYNC Command 
    • START LOW
    • Wait 3mS (spec calls for 1.138ms min for conversion, time is not an issue here)
    • Read data
    • Wait 30mS
    • Repeat

    This results in significant current savings.

    In the above spec, it mentions that it will shut off when sleep is sent OR start is low. I am concerned with the "OR" part if the conversion is not complete. When START goes low, I can see that VREFOUT immediately shuts off and I am pretty sure the conversion is not complete at this point. 

  • 0 in reply to George Sarkees
    TI__Guru 56611 points

    Hi George Sarkees,

    The behavior as described in the datasheet is what I am seeing on the EVM - see below (the REFOUT waveforms are not great because my logic analyzer has fairly low resolution analog, but you get the idea)

    Basically, I have set VREFCON = 11b such that the VREF powers down once the conversion is complete or the START pin is brought low. Also I am sampling at 20 SPS. Once the START pin (green signal) is taken low the first time, the REFOUT voltage (blue signal) remains at ~2.048V until the conversion completes (indicated by yellow DRDY toggling). Then I pulse START again, triggering another conversion. The REFOUT returns to 2.048V because the VREF powers back up, then ~50ms later I get another DRDY pulse indicating that the conversion is complete. Note that START was low during almost the entire process the second time, but REFOUT remains at 2.048V until the conversion completes as indicated in the datasheet. Then you can see the powerdown behavior again, due to the 10uF cap on the REFOUT pin.

    So this should not be a concern of yours, the ADC does wait for the conversion to complete before powering down the VREF. This makes sense because otherwise the conversions would be all screwed up

  • 0 in reply to Bryan Lizon86
    Prodigy 20 points

    Thank you, Bryan,

    I do see similar behavior, but my question is more geared towards the sequence that I am proposing. In short will adding sync after the start and waiting for a subsequent conversion valid? I see from the spec that a SYNC occurs when start is toggled, but my conversions with and without including the sync differ. 

  • 0 in reply to George Sarkees
    TI__Guru 56611 points

    Hi George Sarkees,

    The SYNC command just restarts the conversion, basically the same as taking START high. I don't know why this would change the behavior of your system.

    Also, the datasheet explicitly says not to mix using the commands and START pin to control conversions - I mentioned this in my original post. So I cannot recommend the sequence you are currently using. Using this guidance, it makes more sense for you to issue the SLEEP and WAKEUP commands to control conversions instead of the SYNC command. You would keep START high at all times.

    -Bryan