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Original question:

AFE58JD32: Max sampling frequency for JESD 2 lane config

AFE58JD32: AFE58JD32 output linerate issue

Lizzy
Prodigy 20 points
Part Number: AFE58JD32

Tool/software:

Hello, experts from TI. I'd like to consult you about AFE58JD32.

According to the chip manual, the line rate calculation formula of jesd output is 0.01xFxfc

(fs = fc)

The value of F is related to the number of  lane and the ADC resolution

The above part is a screenshot I took from the chip manual.

We set the clock of AFE at 80 MHz, configured in 4 ADCS PERLANE mode, and the ADC resolution is 12 bits. According to the chip manual, we can determine that the value of F is 6 and the value of fc is 80 Msps.

Therefore, under this configuration, the line rate calculation result of JESD is 4.8 Gbps.

IF We set the clock of AFE at 80 MHz, configured in 8 ADCS PERLANE mode, and the ADC resolution is 12 bits. According to the chip manual, we can determine that the value of F is 12 and the value of fc is 80 Msps.

Therefore, under this configuration, the line rate calculation result of JESD is 9.8 Gbps. In this situation, the line rate achieved was 9.8 Gbps, which has exceeded 5 Gbps. This is quite confusing. Is there a problem with the understanding? Could a TI expert please help clarify it for me? Thank you.

  • 0
    TI__Expert 7685 points

    Hi,

    The calculations are correct . 

    In the second case lane rate turns out to be 9.6Gbps and higher than supported 5GBPS . So you must not configure the device in this way .

  • 0 in reply to Sachin H K
    Prodigy 20 points

    thank you Slight smile

    Another issue is that we have set the system to 4 ADCS PERLANE mode,with a system clock of 80 MHz. Then the sampling frequency is 40 Msps.


    The total bandwidth in the 4-lane mode is 40(sampling freq) * 16(Number of ADCs) * 12 (Serialization factors) = 7.680Gbps

    The total bandwidth after 8B10 encoding = 7.680*10/8 = 9.6Gbps

    The linerate of each lane = 9.6/4 = 2.4Gbps  

    (

    We set the clock of AFE at 80 MHz, configured in 4 ADCS PERLANE mode, and the ADC resolution is 12 bits. According to the chip manual, we can determine that the value of F is 6 and the value of fc is 80 Msps.

    Therefore, under this configuration, the line rate calculation result of JESD is 4.8 Gbps

    )



    Is there a mistake in the calculation somewhere, causing the calculated value to be different from the one in the manual?



  • +1 in reply to Lizzy
    TI__Expert 7685 points

    Fs = 80 MHz 

    Fc = 40 MHz

    NO_ADC_PER_LAne = 4

    Lane rate = FS* NO_ADC_PER_LANE* ADC_RES * 10/ 8

    Lane rate = FC * 2 * NO_ADC_PER_LANE*12 * 10/ 8

    Which is 40 MHz* 2* 4 *12* 10 /8 = 4.8 GBPS