Tool/software:
Hello TI Support,
I am currently trying to get the Link layer test working for my system which consists of a Xilinx FPGA and DAC39J84.
I managed to get the Repeating ILA test to complete successfully.
However for the Repeated K28.5 test I keep getting disparity error on Lane #0 alarm register (i.e. Register 0x64 bit8 = 8b/10b disparity error).
Similarly for Lane #1.
I'm only configuring register Config74 for these tests which based on my understanding is all that is required.
Am I missing any other configuration for this particular test?
Thank you.
Regards,
Tai
