Tool/software:
Dear TI Support,
I am planning to use the TI-JESD204c-IP that was provided to me.
I need to replace the existing JESD IP in a well-functioning project with the provided TI-JESD204c-IP. However, I am facing difficulties because I do not fully understand the FPGA design and architecture.
The original project uses the XCAU25P-SFVB784-A-I, but I am trying to use the vcu118_8b10b files provided, because it uses GTY transceivers, and I believe the Kintex UltraScale+ has similar specifications.
The existing project is written in VHDL. I would like to know whether I can directly use the top module TI_204c_IP_ref from the provided TI-JESD204c-IP as a VHDL component in my design, or if I should only extract and use the JESD IP and Transceiver Wizard separately.
Additionally, is the TI_204c_IP_entity file the module corresponding to the JESD IP?
I would greatly appreciate it if you could provide guidance on how to integrate the provided TI-JESD204c-IP into my existing project.
Thank you for your support.
Best regards,
Jeong