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Original question:

ADS7038-Q1: DECAP pin specification

ADS7038-Q1: Inquiry Regarding Decap Pin Specifications and Internal Connection

Daigo Kawaura
Prodigy 50 points
Part Number: ADS7038-Q1
Other Parts Discussed in Thread: ADS7038

Tool/software:

Dear TI Support Team,

I am currently working on a project involving the ADS7038 and have a few technical questions regarding the decap pin:

  1. Is there a specified input voltage tolerance range for the decap pin?
  2. How is the decap pin connected internally within the IC?
    • I understand from other inquiries that there is an internal LDO. Could you clarify where exactly the decap pin connects within the LDO?
  3. My understanding is that the LDO generates 1.76 V from AVDD. Is this correct?
    • If so, what is the purpose of the 1.76 V rail?
  4. If possible, could you provide a block diagram showing the area around the decap pin?

Reason for inquiry:
We are conducting an FMEA analysis and need to understand under what conditions the decap pin could fail. The Pin FMA document mentions that the decap pin has a rated range, but no specific values were provided.

Thank you for your support, and I look forward to your response.

Best regards,
Daigo Kawaura

  • 0
    TI__Genius 15510 points

    Hi Kawaura-san,

    The internal LDO behind the DECAP pin supplies internal core voltage to the chip. There is not a specification we give for the tolerance to external voltage of the LDO, as this has not been tested for.

    The decap pin is located at the output of the LDO. The decoupling capacitor placed there helps maintain a steady supply voltage.

    Please let me know if this is sufficient information. Further investigation will require some longer turn times.

    Regards,
    Joel

  • 0 in reply to Joel Meraz
    Prodigy 50 points

    Hello Joel,

    I appreciate your earlier response. I have a few follow-up questions regarding the DECAP pin behavior under fault conditions, as described in the document ADS7038-Q1 Functional Safety FIT Rate, FMD and Pin FMA:

    1. When the DECAP pin is shorted to GND or left open, the document states that the device becomes non-functional and the supply current increases.

      • In these cases, are the device outputs in a high-impedance (Hi-Z) state?
      • Does the increased supply current refer to the current flowing into AVDD?
      • What is the maximum current that can flow in each case (short to GND or open)?

    2. When the DECAP pin is shorted to the supply, the document mentions that “a voltage higher than the absolute maximum rating is applied to the pin because the minimum supply voltage is higher than the absolute maximum voltage rating of the DECAP pin.”

      • Could you please provide the absolute maximum voltage rating for the DECAP pin?

    Thank you again for your support. I look forward to your response.

    Best regards,
    Daigo Kawaura

  • 0 in reply to Daigo Kawaura
    TI__Genius 15510 points

    Hi Kawaura-san,

    I can only give my best guess on this. Whatever information is in the functional safety report will ultimately be the most reliable information.

    As the DECAP pin is the output of an internal LDO, I would expect a short circuit to GND to increase supply current and potentially damage the device. An open circuit may pose as as big of an issue, but would hinder performance, or cause power instability. 

    I do not have information on what the status of the outputs are during a short circuit or open circuit condition. I would expect the device to not be functional in a short circuit condition, and the outputs to effectively be Hi-Z. With an open-circuit, it is not clear.

    For current flow I also do not have information. This has not been characterized for, and for all intents and purposes, any condition that shorts the DECAP pin is to be avoided. 

    Per my understanding, there is no external published specification of absolute maximum voltage rating on the DECAP pin. It is at least 1.76V, and maximum 2.35V, between the output voltage of the LDO, and the minimum device operating voltage. I would estimate the absolute maximum is about 2V, but again, there should not be an external voltage applied to this pin under any normal operating condition.

    Let me know if this information is sufficient. I can ask for more information from my team, but it will take some time, and the earliest I can reply is mid next week. 

    Regards,
    Joel