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ADS1298 RLD Measurement...Not seeing?

Other Parts Discussed in Thread: ADS1298

Hello  I am having some issues with what I am seeing as output on the ADS1298 and believe it has to do with the configuration of the registers.  To help debug this I am trying to get RLD_OUT to be measured on various channels.  I have outlined the schematic/channel config below along with my Register Configuration.  I have been trying to measure the RLD to help Debug this in which I am not even seeing anything on the RLDOUT pin when I configure the Device to use the internal Ref for RLD and Enable the Buffer.

Shouldn't I see a voltage output of (AVDD-AVSS)/2 on the RLDOUT pin when this is configured?                                   

Do the RLD_SENSP/N setting dictate whether this occurs? 

I should still see this even if I am in Test Mode correct?

Sch/Channel Setup:

Ch1 = V1 = V1-WCT

Ch2(LL connected to IN2P RA connected to IN2N):  LEAD I  = LA - RA

Ch2(LL connected to IN2P RA connected to IN2N):  LEAD II = LL - RA

Ch3 = V6 = V6 - WCT

Ch4 = V5 = V5 -WCT

Ch5 = V4 = V4 - WCT

Ch6 = V3 = V3 - WCT

Ch7 = V2 = V2 - WCT

Ch8 = V1 = V1 - WCT

We are running this in WCT_TO_RLD mode which I am not convinced is configured correctly on the schematic.  As the datasheet indicates RLD_OUT should be shorted to RLD_INV and they have a RC filter with 390K and .01uF between RLD_OUT and RLD_INV? 

CONFIG REG SETTINGS:

    /* Set the config Registers (this is the first chunk). */
    //CONFIG1: High Res Mode, 1kHz Data_Rate: HR_1K_SPS is already OR'd with CONFIG_1_HIGH_RES
    config_data[0x00]  = (ADS129X_CONFIG_1_HR_1K_SPS);                           
    //CONFIG2: Constant Chop Freq, TEST_AMP=1(2x -(VREFP-VREFN)/2400 V
    config_data[0x01]  = (ADS129X_CONFIG_2_WCT_CHOP_CONST | ADS129X_CONFIG_2_INT_TEST_EN |  
                                 ADS129X_CONFIG_2_TEST_AMP_2X | ADS129X_CONFIG_2_TEST_FREQ_2HZ);                                     
    // CONFIG3:  Since External VREF is being used Disable Internal VREF Buffer, VREF=External
    //           RLDREF=Internal, PD_RLD(ON), RLD_LOFF_SENS=?, RLD_STAT = ?
    config_data[0x02]  = ((1 << 6) ADS129X_CONFIG_3_RLD_MEAS_MUX |ADS129X_CONFIG_3_RLD_REF_INT | 
                                                    ADS129X_CONFIG_3_RLD_POWER_EN );                                    
    config_data[0x03]  = (ADS129X_LOFF_FLEAD_OFF_DC);                                       // LOFF
    //Set all channels to PGA GAIN = 6, Configure Ch3 & Ch6 To measure RLD
    config_data[0x04]  = (ADS129X_CHxSET_GAIN_6 | ADS129X_CHxSET_MUX_TEST);                 // CH1SET=LEAD1 = LA-RA
    config_data[0x05]  = (ADS129X_CHxSET_GAIN_6 | ADS129X_CHxSET_MUX_TEST);                 // CH2SET=LEAD2 = LL-RA
    config_data[0x06]  = (ADS129X_CHxSET_GAIN_6 | ADS129X_CHxSET_MUX_RLD_MEAS);                 // CH3SET=V6 = V6-WCT
    config_data[0x07]  = (ADS129X_CHxSET_GAIN_6 | ADS129X_CHxSET_MUX_TEST);                 // CH4SET=V5 = V5-WCT
    config_data[0x08]  = (ADS129X_CHxSET_GAIN_6 | ADS129X_CHxSET_MUX_TEST);                 // CH5SET=V4 = V4-WCT
    config_data[0x09]  = (ADS129X_CHxSET_GAIN_6 | ADS129X_CHxSET_MUX_RLD_MEAS);               // CH6SET=V3 = V3-WCT
    config_data[0x0A]  = (ADS129X_CHxSET_GAIN_6 | ADS129X_CHxSET_MUX_NORMAL);               // CH7SET=V2 = V2-WCT
    config_data[0x0B]  = (ADS129X_CHxSET_GAIN_6 | ADS129X_CHxSET_MUX_NORMAL);               // CH8SET=V1 = V1-WCT

    //RLD_SENSEP =>  How does this tie into measuring RLD?  Using WCT_TO_RLD...
    config_data[0x0C] = (0x06);                                                             // RLD_SENSP
    //RLD_SENSEN =>  Same question as RLD_SENSEP, WCT is connected to IN3N,IN4N,IN5N,IN6N,IN7N,IN8N
    config_data[0x0D] = (0x06);                                                             // RLD_SENSN
    // LOFF_SENSP
    config_data[0x0E] = (0x00);                                                             // LOFF_SENSP
    // LOFF_SENSN
    config_data[0x0F] = (0x00);                                                             // LOFF_SENSN
    // LOFF_FLIP
    config_data[0x10] = (0x00);                                                             // LOFF_FLIP
    Ads129xRegWrite_sync(info, ADS129X_CONFIG_1, config_data, 0x11);

//Need to split up Config Register writes as LOFF_STATP and LOFF_STATN are Read-Only Registers   
    config_data[0x00]  = (0x01);                                                            // GPIO
    config_data[0x01]  = (0x00);                                                            // PACE
    config_data[0x02]  = (1 << 5 );                                                         // RESP
    //CONFIG 4: Continuous Mode(default), WCT_TO_RLD: ON/OFF?, 
    config_data[0x03]  = (ADS129X_CONFIG_4_LOFF_COMP_ON | ADS129X_CONFIG_4_WCT_TO_RLD_ON );                                   // CONFIG4
    //  WCT1:  WCTA is connected to RA electrode, RA is connected to IN2N/IN1N on schematic. 
    config_data[0x04]  = (ADS129X_WCT1_WCTA_POWER_ON | ADS129X_WCT1_WCT_AMP_A_CH1_N );            // WCT1
    //  WCT2:  WCTB is connected to LA, Schematic LA = IN1P
    //  WCT2:  WCTC is connected to LL, Schematic LL = IN2P
    config_data[0x05]  = (ADS129X_WCT2_WCTB_POWER_ON | ADS129X_WCT2_WCT_AMP_B_CH1_P |       // WCT2
                          ADS129X_WCT2_WCTC_POWER_ON | ADS129X_WCT2_WCT_AMP_C_CH2_P);
    Ads129xRegWrite_sync(info, ADS129X_GPIO, config_data, 0x06);

I have tried to include a schematic of the ADS1298 but not sure if it is getting attached correctly?

3146.NAD01-80001-03-SCH, Short.pdf

Regards,

Frank