ADS8556 HW mode

stephane bradfer

Prodigy 200 points

Other Parts Discussed in Thread: ADS8556

I've made a pcb board with 4 ADC's in hardware mode and serial interface,

Each ADS8556 is set as :

- hardware mode (HW/SW pin 62 = LOW)

- serial interface (PAR/SER pin 61 = HIGH)

- SEL_A pin17 = HIGH , SEL_B pin16 =LOW, SEL_C pin15 = LOW

Can I use the Sequential mode to get all 96 data bits on SDO_A as per figure 37 of data sheet without using previous software mode.

over 10 years ago

0 Tom Hendrick over 10 years ago

TI__Guru**** 180961 points

Hi Stephane,

When the ADS8556 is configured for hardware mode, you don't have access to the configuration register bits to setup the 'sequential' mode of operation. However, as long as you tie the three CONVST inputs together with SEL_A=1 and SEL_B=SEL_C=0, you can get all conversion results through the SDO_A output pin as shown in Figure 37.

For the sequential mode to work properly, you need to use an external conversion clock and you also need to ensure the CONVST inputs are synchronized to it.

0 stephane bradfer over 10 years ago in reply to Tom Hendrick

Prodigy 200 points

Hi Tom,

In our HW the AD is programmed in HW mode with:

Hardware mode (HW/SW pin 62 = LOW
serial interface (PAR/SER pin 61 = HIGH)
CONVST_A, CONVST_B, CONVST_C tied together (all 3 channels are instantaneously sampled)
SEL_A = H, SEL_B = SEL_C = 0 (all data are available on SDO_A)
RANGE/XCLK connected to BGND.
Reset pin driven (reset pulse duration: 200msec)

Although rising edge of CONVST, the BUSY signal doesn’t change except after falling edge of reset signal, when it changes 2 times: the first BUSY change comes with the first rising edge of CONVST (first CONVST after reset) and the second one comes 4-5µs after the first one.

Do you have a cause of this behaviour? More general, why BUSY never goes high?

Have a look on the attached schematic : /cfs-file/__key/communityserver-discussions-components-files/73/BB_5F00_VECEP-_5F00_-PAGE5_5F00_ADC_5F00_color.pdf

Best regards,

Stephane

0 Tom Hendrick over 10 years ago in reply to stephane bradfer

TI__Guru**** 180961 points

Hi Stephane,

Can you send along some timing captures from your control signals?

0 stephane bradfer over 10 years ago in reply to Tom Hendrick

Prodigy 200 points

Hi Tom,

Have you checked the schematic I sent ?

Note that all the control signals settings are the same for all ADCs

The ADC1_A (U506) shows erratic behaviour

The ADC2_B (U512) and ADC3_C (U518) is not working

Refer to ADC_capture1.docx for some timing captures from your control signals :

/cfs-file/__key/communityserver-discussions-components-files/73/ADC_5F00_capture1.docx

Regards

stephane

0 Tom Hendrick over 10 years ago in reply to stephane bradfer

TI__Guru**** 180961 points

Hi Stephane,

Yes, I've looked over the schematics and don't see anything that looks wrong. By the screen captures, it looks like you are putting the ADS8556 into it partial power down state somehow. That would explain the loss and potential erratic behavior of the BUSY pin. Can you invert CONVST and then use BUSY like an interrupt before applying the CS/FS to read the output data?

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ADS8556 HW mode