Thank you very much for your timely response. Sorry that i had uploaded a old schematic before. The present circuit schematic has been uploaded now in which i hav been facing the fluctuation issues . And the VREFCOM has been connected to AGND in this schematic as suggested but problem still persists .
The problem is that if the ic is sampled at 20 sps a stable reading is obtained in the output, But when the sampling is done at 80 sps , there is a huge fluctuation in the output count obtained from the Ic.
The reason for going for a higher sps is the conversion time. Sampling @20sps with 6 ADS1248 IC's for reading 12channels takes a time of ~3sec for convertion. So for bringing down the conversion time, we are planning to sample @ 80 sps which may decrease the conversion time to ~1.2 seconds. sampling @80sps is also reading the proper value , but the fluctuation has been the issue.