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Initial Verilog Code for TSW1266EVM with Altera Stratix IV

Other Parts Discussed in Thread: HSMC-ADC-BRIDGE, ADS5402EVM

Hi,

I have brought TI TSW1266EVM which is connected to an Altera FPGA (Stratix IV)

Can TI provide any initial demo FPGA programming file for using port A of FPGA to receive data from TSW1266 EVM?

Thanks,

Anthony