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Hi,
I'd like to use the TI ADS5401 in a schematic, but I have a question regarding the sync input. The datasheets mentions to keep them logic low to disable this pin. However, these pins are differential LVDS inputs. Do I have to connect them both to ground, or supply the appropriate voltage levels to SYNCP and SYNCN? Or is there a better way to disable this sync option?
Kind regards,
Dave G.
Hi,
in general, when there is a differential input that left open circuit or disconnected then what can happen is that the differential voltage across the pins could drift to about 0V across the pins, and then the input buffer can begin to 'chatter' as any small level noise could make the buffer see a logic 1 and then a logic 0, etc., and randomly begin switching back and forth. If the signal from the buffer is not used further down the signal chain, such as if in this case you set the SYNC mode to not use the SYNC input, then the worst that can happen is that this chattering input buffer creates unnecessary noise in the system. Using a couple of biasing resistors to bias the input buffer off, such as a weak pulldown resistor on the positive side and a weak pullup resistor on the negative side would prevent such chatter. Something like maybe 1Kohm or even 10Kohm. Sometimes this biasing might be built into the device, but not in this case. in this case, the device has another register bit programmable through the SPI port to turn off the input buffer completely so that it doesn't chatter - bit D5 in register 38 SYNC EN. You could program this bit to turn off the SYNC input buffer or externally bias the SYNC input to be a logic low as I just described. And the SYNC SELECT field in registers E and F could be programmed to zero so that the SYNC function is disabled anyway.
Regards,
Richard P.