ADS1243: ADS1243 interface with MSP432P401R controller

// MSP432P401M controller
/*
 * main.c
 * Created on: April 04, 2017
 */


#include "msp432p401m.h"
#include "ads1243.h"

void main(void)
{
    WDT_A->CTL = WDT_A_CTL_PW + WDT_A_CTL_HOLD;            // Stop WDT
    pin_init();
    dev_init_48M();
    dev_init_32k();
    InitDevice();
    InitSPI();
    InitDevice();
    InitSPI();
    ADS1243WaitForDataReady();
    ADS1243AssertCS();
    ADS1243SendByte();
    ADS1243ReceiveByte();
    ADS1243ReadData();
    ADS1243ReadRegister();
    ADS1243WriteRegister();
    ADS1243WriteSequence();
    ADS1243Speed();
    ADS1243Range();
    ADS1243SendSync();
 }




void InitSPI(void)
{
#if defined (__MSP432P401M__)

        EUSCI_B3->CTLW0 |= EUSCI_B_CTLW0_SWRST; // Put state machine in reset

        EUSCI_B3->CTLW0 = EUSCI_B_CTLW0_SWRST |
                EUSCI_B_CTLW0_SYNC |            // Synchronous mode
                EUSCI_B_CTLW0_CKPL |            // Clock polarity high
                EUSCI_B_CTLW0_MSB |             // MSB first
                EUSCI_B_CTLW0_MODE_1 |          // 4-pin SPI mode
                EUSCI_B_CTLW0_MST|              // master mode select
                EUSCI_B_CTLW0_STEM |            // STE mode select
                EUSCI_B_CTLW0_SSEL__SMCLK;      // SMCLK
        EUSCI_B3->BRW = 0x01;                   // /2,fBitClock = fBRCLK/(UCBRx+1).
        EUSCI_B3->CTLW0 &= ~EUSCI_B_CTLW0_SWRST;// **Initialize USCI state machine**
        while(!(UCB3IFG&UCTXIFG));          // Make sure nothing is already in the TX buffer
           UCB3TXBUF =0x55;    // 4-pin, 8-bit SPI slave
 #endif
}

void InitDevice(void)
{
#if defined (__MSP432P401M__)

    P10->SEL0 |= ADS1243_DIN + ADS1243_DOUT + ADS1243_SCLK;
    P2->SEL0 &= ~(ADS1243_DRDY);

    // define initial state
    P10OUT |= ADS1243_CS;

    // define inputs
    P2DIR &= ~(ADS1243_DRDY);                   // DRDY is an input to the micro

    // define outputs
    P10DIR |= ADS1243_CS;

#endif
}

/*
 * DRDY Polling Function
 * Timeout = 0 is wait until DRDY goes low no matter how long it takes, otherwise wait the specified number of cycles
 */
int ADS1243WaitForDataReady(int Timeout)
{
    /* This function shows a method for polling DRDY instead of using as interrupt function
     * -- Note: this method is not used in the demo, but if we the method was switched to polling from the interrupt method,
     * the desired port is PORT2 on the MSP430 as this demo is configured.
     */
    #if defined (__MSP432P401M__)
    if (Timeout > 0)
    {
        // wait for /DRDY = 1 to make sure it is high before we look for the transition low
        while (!(P2IN & ADS1243_DRDY) && (Timeout-- >= 0));
        // wait for /DRDY = 0
        while ( (P2IN & ADS1243_DRDY) && (Timeout-- >= 0));
        if (Timeout < 0)
            return ADS1243_ERROR;                   //ADS1243_TIMEOUT_WARNING;
    }
    else
    {
        // wait for /DRDY = 1
        while (!(P2IN & ADS1243_DRDY));
        // wait for /DRDY = 0
        while ( (P2IN & ADS1243_DRDY));
    }

#endif

    return ADS1243_NO_ERROR;
}

/*
 * Primary Low Level Functions
 */
void ADS1243AssertCS( int fAssert)
{
#if defined (__MSP432P401M__)
    // This example is using PORT10 for GPIO CS control, ADS1243_CS is defined in ADS1243.h
    if (fAssert){               // fAssert=0 is CS low, fAssert=1 is CS high
        _delay_cycles(50);      // Must delay minimum of 7 tosc periods from last falling SCLK to rising CS
        P10OUT |=  (ADS1243_CS);
    } else
        P10OUT &=  ~(ADS1243_CS);
#endif
}

void ADS1243SendByte(unsigned char Byte)
{
    char dummy;
#if defined (__MSP432P401M__)
    dummy = UCB3RXBUF;
    while(!(UCB3IFG&UCTXIFG));          // Make sure nothing is already in the TX buffer
    UCB3TXBUF =0x55;                    // Send the passed Byte out the SPI bus
    while(!(UCB3IFG&UCRXIFG));          // Before returning wait until transmission is complete and clear the RX buffer
    dummy = UCB3RXBUF;

#endif
}

unsigned char ADS1243ReceiveByte(void)
{
    unsigned char Result = 0;
#if defined (__MSP432P401M__)

  //  while(!(UCB3IFG&UCTXIFG));          // Make sure nothing is currently transmitting
  //  UCB3TXBUF = ADS1243_CMD_NOP;        // Send out NOP to initiate SCLK
    while(!(UCB3IFG&UCRXIFG));          // Wait until all data is transmitted (received)
    Result = UCB3RXBUF;                 // Capture the receive buffer and return the Result

#endif
    return Result;
}

long ADS1243ReadData(void)
{
    long Data;
    // assert CS to start transfer
    ADS1243AssertCS(0);
    // send the command byte
    ADS1243SendByte(ADS1243_CMD_RDATA);
    // get the conversion result
#ifdef ADS1243
    Data = ADS1243ReceiveByte();
    Data = (Data << 8) | ADS1243ReceiveByte();
    // sign extend data if the MSB is high (16 to 32 bit sign extension)
    if (Data & 0x8000)
        Data |= 0xffff0000;
#else
    Data = ADS1243ReceiveByte();
    Data = (Data << 8) | ADS1243ReceiveByte();
    Data = (Data << 8) | ADS1243ReceiveByte();
    // sign extend data if the MSB is high (24 to 32 bit sign extension)
    if (Data & 0x800000)
        Data |= 0xff000000;
#endif
    // de-assert CS
    ADS1243AssertCS(1);
    return Data;
}

void ADS1243ReadRegister(int StartAddress, int NumRegs, unsigned * pData)
{
    int i;
    // assert CS to start transfer
    ADS1243AssertCS(0);
    // send the command byte
    ADS1243SendByte(ADS1243_CMD_RREG | (StartAddress & 0x0f));
    ADS1243SendByte((NumRegs-1) & 0x0f);
    // get the register content
    for (i=0; i< NumRegs; i++)
    {
        *pData++ = ADS1243ReceiveByte();
    }
    // de-assert CS
    ADS1243AssertCS(1);
    return;
}

void ADS1243WriteRegister(int StartAddress, int NumRegs, unsigned * pData)
{
    int i;
    // set the CS low
    ADS1243AssertCS(0);
    // send the command byte
    ADS1243SendByte(ADS1243_CMD_WREG | (StartAddress & 0x0f));
    ADS1243SendByte((NumRegs-1) & 0x0f);
    // send the data bytes
    for (i=0; i < NumRegs; i++)
    {
        ADS1243SendByte(*pData++);
    }
    // set the CS back high
    ADS1243AssertCS(1);
}

void ADS1243WriteSequence(int StartAddress, int NumRegs, unsigned * pData)
{
    int i;
    char dummy;
    // set the CS low
    ADS1243AssertCS(0);
#if defined (__MSP430F5529__)
    // send the command byte
    dummy = UCB3RXBUF;
    while(!(UCB3IFG&UCTXIFG));          // Make sure nothing is already in the TX buffer
    UCB3TXBUF = ADS1243_CMD_WREG | (StartAddress & 0x0f);
    while(!(UCB3IFG&UCRXIFG));
    dummy = UCB3RXBUF;
    UCB3TXBUF = (NumRegs-1) & 0x0f;
    while(!(UCB3IFG&UCRXIFG));
    dummy = UCB3RXBUF;
    // send the data bytes
    for (i=0; i < NumRegs; i++)
    {
        UCB3TXBUF = *pData++;
        while(!(UCB3IFG&UCRXIFG));
        dummy = UCB3RXBUF;
    }

#endif
    // set the CS back high
    ADS1243AssertCS(1);
}

int ADS1243Speed(void)
{
    // write the register value containing the new value back to the ADS
    ADS1243WriteRegister(ADS1243_2_ACR , 0x01,ADS1243_SPEED_1);


}

int ADS1243Range(void)
{
    // write the register value containing the new value back to the ADS
    ADS1243WriteRegister(ADS1243_2_ACR , 0x01, ADS1243_SCALE_1);
}

void ADS1243SendSync(void)
{
    // assert CS to start transfer
    ADS1243AssertCS(0);
    // send the command byte
    ADS1243SendByte(ADS1243_CMD_DSYNC);
    // de-assert CS
    ADS1243AssertCS(1);
    return;
}