ADS1120: About behavior of DRDY

Hi Tachibana-san,

See my comments below...

Best regards,

Bob B

Masanori Tachibana said:

Part Number: ADS1120

Hello support team,

I have some questions regarding ADS1120.

Our customer is evaluating in the following conditions.
        Data rate: 330 SPS
        Operating mode: Normal mode
        Conversion mode: Continuous Conversion Mode
After setting Configuration Register 1, send START/SYNC command.
Then wait for Data Ready output. And read data out when DRDY is asserted.

Under these conditions, the customer acquires the data in Continuous Conversion Mode.
Sometime the phenomenon that DRDY does not output has occurred. [Bob B] How is this behavior determined? Is this done by monitoring with a scope or logic analyzer?  If so, screen shots of the behavior would be helpful as would a schematic.

[Question]
1) Is there any possibility that DRDY will stop while operating in Continuous Conversion Mode? [Bob B] It is possible....
What factors can be thought when DRDY stops? [Bob B] Continuous conversions will cease if the RESET or POWERDOWN commands are issued.  There are also other factors that may halt conversions by triggering a POR (power-on reset) such as poor or noisy power supplies, turning off one of the supplies, or by an ESD event.
In the datasheet, it is written that DRDY remains low when no data are read. What is the condition when no data are read? [Bob B] If no data are read between conversions DRDY will stay low until the next conversion is complete at which time the DRDY will pulse from low to high to low.  This is discussed in section 8.5.1.3 of the ADS1120 datasheet and is shown in several figures such as Figure 61 where if DRDY is already in a low state will pulse high for 2*tmod periods.  This is a very small time if polling the DRDY pin, so it is better to use an interrupt driven system to monitor a high to low transition of DRDY.

2) Is there any possibility that DRDY will be delayed? [Bob B] It is possible....
What factors can be thought if DRDY is delayed? [Bob B] The only factors that would delay a continuous conversion is if the conversion were to be restarted.  Conversions can be restarted by issuing another Start/Sync command or by writing to one of the configuration registers.  This is mentioned in section 8.4.2.2.
And what is the maximum delay if DRDY is delayed? [Bob B] The maximum delay would be one conversion cycle if the conversion is restarted near the end of the current conversion.

Best regards,
M. Tachibana

Hi Tachibana-san,

See my responses below.

Best regards,

Bob B

Masanori Tachibana said:

Hello Bob-san,

I got an additional questions from the customer.

1. In your previous answer, you said as follows.
"There are also other factors that may halt conversions by triggering a POR (power-on reset) such as poor or noisy power supply, turning off one of the supplies, or by an ESD event."
Is there any cases of POR like the above occurred in the field? [Bob B] It is possible, although the likelihood is small.  The most likely field failure will be due to some transient event that is transferred into the analog inputs or analog supply.
If there were some cases, how did you make countermeasure? [Bob B] The use of TVS diodes, ferrites, capacitors and current limiting resistors are all very effective for suppression of transients and limiting the effects of transient events.  Proper PCB layout is also important.  If cabling is connected between the sensor and the PCB, then the cabling should be properly shielded and terminated at the PCB.  What will actually be required is dependent on the system application and the operating environment.  Transients can be caused by ESD events, EMI (motor switching for example) and RFI (cell phones or WiFi for example).  Adding a large number of transient protection devices may solve transient issues, but not all protection is necessary or required.  Transient protection devices are often leaky and can cause error so you don't want to add more than necessary.
  
2. Is there any method to detect unexpected POR? [Bob B] Unfortunately the ADS1120 does not have a POR status feature, however some devices such as the ADS114S06 has a status register bit indicating a POR event has taken place.  If a POR event does take place, all registers are reset to the default values and if operating in continuous conversion mode, the conversions will stop following the initial conversion at POR restart.  So if the register settings change from what was last set to the default value, then it is likely a POR has taken place.  This may be an indirect method to check that a POR has taken place by checking the contents of a specific register.
 
3. If the reset command or power down command or POR don't be issued, will continuous conversion be executed at fixed intervals, except for the first sequence?
Does stability of this cycle in this case depend on SCLK? [Bob B] This question is difficult to answer as there are a number of dependencies. When operating in continuous mode with no changes to the register settings, then the completion of the conversion will be in fixed number of clock cycles as illustrated in Table 11 on page 28 of the ADS1120 datasheet.  The length of time may vary slightly depending on the clock stability of fosc.  When using the internal oscillator the time can vary by as much as +/- 2%.  So there is a fixed interval, but not necessarily a fixed time interval.  If the ADS1120 is operating in continuous conversion mode and a register configuration is changed (such as a mux change) the conversion will restart altering the completion time of the conversion from the previous fixed interval.  This register change alters the fixed interval start point from the previous falling edge of DRDY to the last SCLK falling edge of the register write command.
 
Best regards,
M. Tachibana