ADS8881: Inquiry for capacitor size and reference input current for ADS8881

Hi Takanori-san,

The ADS8881 is a SAR ADC, where the reference voltage is sampled several times during each conversion phase. 

The reference input is not a high impedance port,  and the reference drive circuit sees an internal switching capacitor array during the conversion phase.  High-current transients (~10’s mA range) are present in the REF input where the ADC’s internal capacitor array is switched and charged as the binary weighted bit decisions are made. These fast current transient pulses occur a few nanoseconds away of each other.  The transients occur every ADS8881 internal conversion clock period (CCLK) (~40ns)

Since the ADC performs bit decisions by comparing the input to the reference voltage, the reference voltage must be quiet and stable, and the voltage on the reference must not droop; or the droop should be less <1 LSB between conversion clock cycles (LSB=38uV with VREF=5V on ADS8881 18-Bit ADC).

The large bypass capacitor works as a large charge bucket and provides instantaneous charge as the bit decisions are made.  Without the bypass capacitor, the external reference circuit will be unable to respond fast enough to these transients and excessive droop on the reference voltage will occur.

The current consumption at the SAR reference input is dynamic, and is not a DC current.  It consists of relative large, fast current spikes in the 10's of mA of amplitude.  The 300uA reference input current is the "average" current consumption (average of these transients) at the REF input when using the device at full-throughput.

Attached is a pdf with a section of a presentation of the SAR Reference input.  Slides 2-6  includes a very detailed explanation/analysis of the ref input current explaining the relation to the large capacitor value to keep the reference stable. It also provides an explanation of a TINA SPICE SAR reference input model.