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ADS7946: Low SCLK rate

Part Number: ADS7946
Other Parts Discussed in Thread: ADCPRO

Hi,

  I've got the ADS7946EVAL PDK set. So far It performs very well. But, paying attention on the ADCPro (either v1x and 2x) with ADS7946 plugin shows that the clock is set to 50MHz. I've tapped the SCLK signal and the osciloscope shows indeed 50MHz SCLK.

  This would be of no issue, BUT, the datasheet states that the MAX SCLK is 40MHz !. Thus my surprise.

   Checking on the parameters of Min High Time and Min Low time for SCLK (8ns + 8ns), it would appear to yield 16ns approx 62.5MHz, If I were to considering rise and fall times of around 2ns, then it would be in the 20ns tclkmin = 50MHz that would match what It is measured and stated by ADCPro... BUT, that is not what it is stated on the Datasheet (40MHz).

   May I ask you whether it is a bug on the ADCPro or the MAX SCLK should be changed to 50MHz on the datasheet or was it just a tweak on the PDK to achieve a longer tacq and thus reducing the requirements of the driving Opamp and meet the datasheet specs?

   Thank you in advance for your time on this matter.

br

Gabriel

  • Gabriel,

    Welcome to the TI E2E Forum!!

    The ADS7946 should not be operated beyond its Max SCLK freq of 40MHz.

    This does look like a bug with the default settings in the ADS7946 plugin in ADCPro.

    Regards,

    Sandeep

  • Hello Sandeep,
    Thanks for the quick reply.
    With regards of the default settings, unfortunately I cannot change the Clock, I can change the sampling frequency, but not the SCLK Freq.
    Even the documentation of the PDK shows the 50MHz on the screenshots.
    In my current project I have to decide whether using 50MHz or 40MHz SCLK, based on your comments I would have to set it to 40MHz, unfortunately I cannot simulate/test with current HW (PDK) my target scenario.
    Any chance to have a corrected version of the ADS7946's ADCPro plugin any time soon?
    Thank you again
    Gabriel