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ADS1230: Ads 1230 gives less count

Part Number: ADS1230

Hi

I have interface ads1230 with at89s52.

I have did offset calibration and read data by 20 bits.

I have given AINP 39mv And AINN AT gnd.

I'm using 64 gain speed 0

But gives only 3900 on seven segment.

I donto exactly what is issue.

Anybody please let me know what should I do??

If I increase analog input above 39 mv will it cause ads1230 unstable!??

  • Hi Hiren,

    Welcome to the E2E forum! You must make sure that the analog input is in the correct input range. The PGA restricts the input voltage where AINN and AINP must be between AGND +1.5V and AVDD - 1.5V. See the section in the Electrical Characteristics table on page 3 of the ADS1230 datasheet under Analog Inputs and the parameter Common-Mode Input Range.

    For a normal bridge sensor, the output is approximately 1/2 of the excitation voltage. If the reference and excitation is the same then the output will be at mid AVDD supply for the ADS1230 which would also place the input voltage within the proper range. So you cannot connect the AINN input to ground and will need to come up with something different for your test input.

    Best regards,
    Bob B
  • Thanks Bob for reply,

    My interfacing circuit is as like on page 20 in datasheet  of ads1230 .

    Did you mean, AVDD-1.5V CONNECT WITH AINP PIN and AGND+1.5V connect with AINN PIN?

    How could I get 0 to 39 mv difference between AINP AND AINN pins?

  • Hi Hiren,

    The analog input voltage for either AINP or AINN must be greater than AGND+1.5V but less than AVDD-1.5V.  So the input voltage must be somewhere in between those 2 voltages.  For example, if AVDD is 5V, then the analog inputs should be between 1.5V and 3.5V.  If AVDD is 3.3V, then the analog inputs should be between 1.5V and 1.8V.  This is called the common-mode input range for the PGA of the ADS1230.

    The most commonly used sensor with the ADS1230 is a bridge sensor.  In most bridge applications, such as a load cell, the output will be 1/2 of the excitation.  If the excitation voltage is 3.3V and AVDD is also 3.3V, the bridge output will be approximately 1.65V with no load applied.  As pressure is applied to the load cell, the output of the load cell will vary relative to the load cell sensitivity which is usually in mV/V of excitation.  If it is 2mV/V for example, then the maximum output of the load cell will be 6.6mV for 3.3V excitaiton.  This small change on top of the no load condition of 1.65V will stay well within the input range.

    When applying a single voltage, you must make sure that your 39mV is offset from ground by at least 1.5V.  So AINN could be at 1.5V and AINP could be at 1.539V which deferentially is 39mV from AINP and AINN. 

    One way of achieving a test circuit is to create a Wheatstone bridge with equal value resistors and one legs can be a potentiometer to vary the output voltage.

    Best regards,

    Bob B

  • Hi Bob,

    Thanks for your clear it to me.

    i have done my circuit as shown in above picture and have also get voltage about 2.5v at AINP pin(with refer). to GND) and 2.539v at AINN pinwith refer). to GND) so the difference is  39mv on both AINN and AINP pins.

    but i also meausre voltage on pin 5 and pin 6 ,the same 39mv i got on it.is it OKAY?

    as well my count is same as i mentioned earlier on start of my question. Which is 3900 counts.

    please guide me what should i have to check to know "is my IC working or not" and get to know exact problem.

    Thanks.

  • Hi Hiren,

    Due to differences in time zones, I cannot respond quickly but I will always do so as soon as I can. If you are seeing only 39mV across cap C1 (pins 5 and 6), then most likley the ADS1230 is damaged. See Figure 18 on page10 of the ADS1230 datasheet showing the input and cap positions. You should see the input signal gained by 64.

    If you are always getting the same count, then you need to make sure that you are communicating correctly. The only way to be sure is by looking at the DRDY/DOUT pin and SCLK pin with an oscilloscope or logic analyzer. If possible send me a picture of the communication.

    You also need to verify that you are reading as soon as possible after DRDY/DOUT transitions from a high to low state. The easiest way of monitoring the DRDY pin is to use the 24 bit data retrieval method shown in Figure 25 of the ADS1230 datasheet. This will always force the DRDY\DOUT pin high following data read. However, you must make sure that you only use the most significant 20 bits for the result.

    You can then poll the state of the DRDY/DOUT pin looking for a low state (or you can use an interrupt looking for a high to low transition) and then send three sets of byte transfers of SCLK to read the data result. Here is where you need to make sure that the scope/logic analyzer data matches the data result of your display. You should never see exactly the same result each time due to noise. A couple of successive reads may be the same, but if you read like 128 successive results you should see some variation within those results. If possible send me 128 samples as continuous (or successive with no breaks between conversions) reads as raw data from the ADS1230 and not processed by the micro. This will tell me if there is truly an issue with the ADS1230.

    Best regards,
    Bob B
  • First of Im so sorry to write reply me ...

    Second, Thanks Bob for your great help .

    I replace my old ADS1230 WITH fresh new one and I get  counts.

    I think, maybe I shorted AINN AND AINP by mistake.

    Once again thanks.