ADC12DJ3200: IBIS model issue

Hi Ammasi,
I have sent your question to an engineer that works with this device.
Best Regards,
Clay

Hi Ammasi
What simulation tool (manufacturer, product name and version) are you using?
Are you using the ADC12DJ3200 IBIS-AMI model or the standard IBIS? The IBIS-AMI model should be used for the high speed data output pairs.
Best regards,
Jim B

Thanks for the reply. Please find my answer inline.
What simulation tool (manufacturer, product name and version) are you using?
Hyperlynx 9.2 version

Are you using the ADC12DJ3200 IBIS-AMI model or the standard IBIS?

I am using standard ibis model.

Hi,

    I have processed the simulation by using "ADC12DJ3200_tx.ami" model. But while loading this ami model along with its 'dll' file to the simulation tool, i am facing some issues. This IBIS-AMI model is coming with the below 4 types of 'dll' files.

But while loading any one of  the 'ADC12DJ3200_tx.dll' , 'ADC12DJ3200_tx_x64.dll' & 'RX_generic_x64.dll', the below error message is received.

I am able to proceed the simulation with the below assignment (with RX_generic.dll).

Is this simulation setting correct as this ami model is specific & dll file is generic and also Why i am getting the above mentioned error?

   

Hi, 

  I can proceed as you suggested. But i have few more doubts as mentioned below.

1. The simulation is getting proceed with the " RX_generic.dll " file but ADC chip always will be the transmitter to the FPGA. Why this conflict is happening?

2. What is the difference between " ADC12DJ3200_tx.dll " & " RX_generic.dll "?

Hi Jim,

Please find my reply inline.
--> The dll used with the ADC12DJ3200_tx_ibs file is the ADC12DJ3200_tx.dll.
while assigning ADC12DJ3200_tx_x64.dll or ADC12DJ3200_tx.dll model, i am getting error log popup (issue in dll assigning) and with that IBIS-AMI simulation is stopped.

Kindly give your suggestions to come out of this issue.

Hi Jim,

Error log images from Ammassi Kani are attached for your reference.

Hi Prahlad and Ammassi
The additional detail in the figures above should be helpful.
I am working with the team that generated to models to determine how to proceed.
Best regards,
Jim B

Hi Ammassi

When this IBIS-AMI model package was created it was validated using Keysight Advanced Design System (ADS) software. There may be some difference with HyperLynx that is causing the error. The modeling team is working to understand the issue, but that may take a few days.

In the meantime perhaps you can try the following alternative workarounds:

1. Try using the model on a 64 bit Windows machine. That will enable use of the ADC12DJ3200_tx_x64.dll instead of the 32 bit version. That may resolve the problem, or if errors are still seen may help point to the root cause.
2. Try using an alternate simulation tool. Keysight ADS would be the best choice as this has been validated.

Best regards,

Jim B

Hi Ammassi
I am trying to set up HyperLynx on my system to validate what you are seeing.
Can you attach the the schematic or board file you are using in conjunction with the ADC12DJ3200 IBIS AMI file so I have the same starting point?
Thanks,
Jim B

Hi Jim,

Thanks for the response. I am planning to use ADS 2017 version SIPro for simulating the JESD204B interface. Can you give me the user defined AMI parameters values to channelsim, configure the eye probe and the TX & RX device or guide us to proceed the simulation using ADS tool.

I have attached SIPI setup of JESD204B interface data line. Please correct it to get the proper result.

Hi Ammasi

I am checking on the requested information for ADS.

I did successfully run the model in HyperLynx 9.2 with 32 bit DLL.

I copied the extracted model file structure into the HyperLynx Libs folder, added the new folder tree to the model search path and then had HyperLynx scan for updated models in that folder path.

Here is the AMI model assignment that worked:

Here is the schematic:

/cfs-file/__key/communityserver-discussions-components-files/73/4428.ADC12DJ3200_5F00_TX_5F00_IBIS_5F00_AMI.ffs

Best regards,

Jim B

Hi Jim,

     Thanks for your effort and input. I have tried simulation with your attached .ffs file. But with that file also, i am getting the same warning. With my custom simulation settings also, i am ended up with the same warning.

Below is the image log for your perusal.

Hi Ammasi

I have not managed to replicate the error you are encountering. It may be due to the 32-bit Windows system you have. I have not located a 32-bit system to try yet.

I did get more information on how to use the IBIS-AMI file with ADS. The .zip includes an archived ADS workspace including schematic simulation settings and plot setup.

To un-archive the workspace please follow the steps in this attached file:

ADC12DJ3200 IBIS AMI ADS Example.pdf

I hope this is helpful.

I'll let you know if I can locate a 32-bit machine and get any results with Hyperlynx.

Best regards,

Jim B

Jim,

         Thanks again for your guidelines. As  you said, i have started doing POST SI simulation, for JESD204B interface simulation in ADS 2017 SIPro tool. As this tool is new to us, we are unable to set some parameters properly and didn't get proper result.

I have attached Post Schematic image and he result of the same. Please guide  us to make proper settings to get the exact result.

Hi Ammasi
Can you send me a .zip file containing the X1 cell you are including in your schematic. I will try to include it in my schematic and get things working, and will then share the archived workspace with you.
Best regards,
Jim B

Hi Jim,

         Thanks a lot for this continuous support for your side. I have imported your file into my ADS 2017 software.

i) The schematic which you have shared is having the below ibis assignment:

For Transmitter : ADC ibis-AMI

For Receiver : RX generic ibis-AMI

ii ) Our custom requirement design is, for the below assignment

For Transmitter : ADC ibis-AMI

For Receiver : ARRIA 10 FPGA ibis-AMI

  By assigning ARRIA 10 FPGA to your schematic (RX port), i am not able to get proper eye. Please assign the attached A10 FPGA ibis model to your schematic and suggest to proceed furtherIBIS_AMI.7z

Hi Ammasi

I tried to use this model but I'm getting the following error message about a missing .s4p file.

Can you send any other referenced model files that are needed for the Arria 10 RX model?

I'll be on vacation for several weeks but will ask a colleague to follow-up in my absence.

Thanks,

Jim B

Hi Jim,

   The attached files are having the required .s4p support files for ARRIA 10 GX FPGA.

    3173.IBIS_AMI.7z

Hi David,
Please help to close this ?

JESD204.wps

Hi,

We are not able to simulate JESD204B serdes interface using IBIS-AMI model due to dll. issue.Please refer earlier posts

Simulated same interface using oscilloscope mode and generated eye diagram.

Refer the serdes eye diagram in the attachment

Figure-1: With AC coupling capacitor 100nF

Figure-2: With out AC coupling capacitor

Figure-3: Linesim Schematic

I would like to know  why the offset is introduced when serdes lines are AC coupled.Please help on this.

Regards,

Ravi

Hi David/Jim,
Please help to share your comments !

Hi Ravi,

Sorry for the delay.

I see that you've gone back to Hyperlynx given that the ADS 32bit problem couldn't be resolved. I am concerned about getting away from ADS. I still think that is the better path forward.

However, I understand the need to get this working. Where did you get the model for the differential driver? I think we've provided an IBIS model for a JESD204B buffer for another device, but if we did, it wouldn't have had de-emphasis.

I'm not sure what to do about the AMI model not running. Have you checked with Keysight. They may have encountered this problem before.

Regards,

David

Hi Ravi
I have so far been unable to view the content in your file JESD204.wps, so I'm unable to answer the questions of your August 24 post.
Can you convert that file to .pdf or other more generic format and reattach?
Thanks,
Jim B

Hi Jim,

Thanks for your reply.

Let me try to convert it in pdf format and reattach here.

Some how we are able to proceed with IBIS-AMI model simulation on another machine using hyper lynx 9.3 version with out dll issue.

Need your help in clarifying below points JESD204B serdes lines simulation.

• Is the jitter values are integrated inside the ibis-ami model of ADC12dj3200 itself or do we need to introduce externally.
• What would be the preferred jitter values need to be introduced for channel simulation.
• Kindly provide below details for jitter inputs (Please refer attachment)

For Tx Device (ADC12DJ3200)

1. Gaussian jitter data in UI
2. Uniform jitter data in UI
3. DCD in UI
4. Sinusoidal Magnitude.
5. Sinusoidal Frequency

For Rx Device 

1. Gaussian jitter data in UI
2. Uniform jitter data in UI
3. DCD in UI
4. Sinusoidal Magnitude.
5. Sinusoidal Frequency

• Kindly provide the recommended eye mask specification for the JESD204b channels.

Request you clarify above points at the earliest to proceed further.

Regards,

Ravi Prasad.

Hi Jim,

Requested file is re attached here.

Regards,

Ravi Prasad.JESD204.docJESD204.pdf

Hi Jim,

Hope you have gone through my post.

Regards,

Ravi Prasad

Hi Ravi
I'm reviewing your data file and looking into the questions regarding jitter, amplitude, etc.
I hope to have a more detailed response tomorrow.
Best regards,
Jim B

Hi,

Thank for your update.

Regards,

Ravi prasad

Hi Ravi
I reviewed your attachment, with the different resulting waveforms depending on the presence or absence of AC-coupling capacitors. I think this may be due to the termination or biasing characteristics of the Arria10_Rx model. I have not seen that type of negative offset in any of the simulations I have done with other Rx models.
I am discussing your jitter requirements with one of the model generation experts.
The IBIS-AMI model does not contain jitter, but the jitter values provided in the ADC12DJ3200 datasheet can be added into the model/simulation. I hope to have more specific guidance on doing this tomorrow.
I hope this is helpful.
Best regards,
Jim B