ADS5294EVM: single wire mode, channel 8 output problem

Hello Amit,

Can you provide your register configuration especially the programmable mapping registers (addr. 50h - 55h)?
Does your register settings work on the ADS5294EVM with TSW1400EVM?

hello Praveen,

sorry for late reply,

I checked the ADS5294 EVM BOARD with the  TSW1400 EVM  for channel no 8 with single and two wire mode it is showing correct output. The clock input is taken externally.

when I use ADS5294 EVM with zc706 via ADC FMC adapter, below images are for the deskew pattern single wire mode and two wire mode at the ILA:

Deskew pattern for two wire mode:

bitclk_out and frameclk_out are the clock output pins and data0_out to data15_out are the data output pins provided by the ads5294 EVM.

the data15_out pin should show the similar pattern to data0_out,data2_out,data4_out,data6_out,data9_out,data11_out and data13_out for single wire mode and

data15_out should be similar for the all the data_out pins for two wire mode.

I am not understanding what is the problem for channel no 8.

please help me with this.

Regards,

Amit

Hi Amit,

It seems like the hardware connections (channel assignments) on the FMC adapter board and Xilinx zc706 FPGA board are fine.
Can you check for the signal on the IO_0P or IO_0N in two wire mode without the Xilinx zc706 FPGA board?
If this looks fine, then you may want to check for the channel assignment on the zc706 FPGA board (I am not familiar with this FPGA board).