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hello everyone,
I am working on ads5294 evm with Xilinx zc706 FPGA, I successfully obtaining output from channel 1 to channel 7 but not from channel 8 , i tried both the pins G9(ch8iutp) and G12(ch7outP) but not showing outputs for any test pattern i don't know why, please help me regarding this problem.
ADC is used in single wire mode.
hello Praveen,
sorry for late reply,
I checked the ADS5294 EVM BOARD with the TSW1400 EVM for channel no 8 with single and two wire mode it is showing correct output. The clock input is taken externally.
when I use ADS5294 EVM with zc706 via ADC FMC adapter, below images are for the deskew pattern single wire mode and two wire mode at the ILA:
Deskew pattern for two wire mode:
bitclk_out and frameclk_out are the clock output pins and data0_out to data15_out are the data output pins provided by the ads5294 EVM.
the data15_out pin should show the similar pattern to data0_out,data2_out,data4_out,data6_out,data9_out,data11_out and data13_out for single wire mode and
data15_out should be similar for the all the data_out pins for two wire mode.
I am not understanding what is the problem for channel no 8.
please help me with this.
Regards,
Amit